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<body><span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
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<a class="bz_bug_link
bz_status_NEW "
title="NEW - [g33 v4.9] gpu hung"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101980">bug 101980</a>
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<th>What</th>
<th>Removed</th>
<th>Added</th>
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<td style="text-align:right;">Summary</td>
<td>drm/i915 gpu hung
</td>
<td>[g33 v4.9] gpu hung
</td>
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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [g33 v4.9] gpu hung"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101980#c1">Comment # 1</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [g33 v4.9] gpu hung"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101980">bug 101980</a>
from <span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span></b>
<pre>Hmm, not much going on. The first thing that stood out as needing to be checked
is
00000000_1e7ff000 8388608 36 00 [ 12c57 00 00 00 00 ] 12c57 Y dirty
render uncached
that is whether the alignment is correct for the unfenced Y buffer.
u32 i915_gem_fence_alignment(struct drm_i915_private *i915, u32 size,
unsigned int tiling, unsigned int stride)
{
GEM_BUG_ON(!size);
/*
* Minimum alignment is 4k (GTT page size), but might be greater
* if a fence register is needed for the object.
*/
if (tiling == I915_TILING_NONE)
return I915_GTT_MIN_ALIGNMENT;
if (INTEL_GEN(i915) >= 4)
return I965_FENCE_PAGE;
/*
* Previous chips need to be aligned to the size of the smallest
* fence register that can contain the object.
*/
return i915_gem_fence_size(i915, size, tiling, stride);
}
so that's clearly wrong.
Can you please try a later kernel, say v4.12?</pre>
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