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<b><a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - gfx corruption on windowed 3d-apps running on dGPU"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101691#c43">Comment # 43</a>
on <a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - gfx corruption on windowed 3d-apps running on dGPU"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101691">bug 101691</a>
from <span class="vcard"><a class="email" href="mailto:michel@daenzer.net" title="Michel Dänzer <michel@daenzer.net>"> <span class="fn">Michel Dänzer</span></a>
</span></b>
<pre>(In reply to Ben Widawsky from <a href="show_bug.cgi?id=101691#c42">comment #42</a>)
<span class="quote">> WRT <a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - gfx corruption on windowed 3d-apps running on dGPU"
href="show_bug.cgi?id=101691#c37">https://bugs.freedesktop.org/show_bug.cgi?id=101691#c37</a>. Not entirely
> sure what you're getting at. dma_buf core should be handling the coherency
> between the two parties and it's up to the driver implementation to handle
> map/begin_cpu_access etc. to handle appropriately. Assuming we're talking
> about dma_buf.</span >
The buffers are shared via dma_buf, but there shouldn't be any CPU access to
the shared buffers.
My question is whether the i915 driver programs the GPU to treat the pages of
the buffers imported from amdgpu as cacheable or non-cacheable.</pre>
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