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            <b><a class="bz_bug_link 
          bz_status_NEEDINFO "
   title="NEEDINFO - [SKL] Enable UMD to control GPGPU EUs slice number in static/dynamic way"
   href="https://bugs.freedesktop.org/show_bug.cgi?id=100899#c6">Comment # 6</a>
              on <a class="bz_bug_link 
          bz_status_NEEDINFO "
   title="NEEDINFO - [SKL] Enable UMD to control GPGPU EUs slice number in static/dynamic way"
   href="https://bugs.freedesktop.org/show_bug.cgi?id=100899">bug 100899</a>
              from <span class="vcard"><a class="email" href="mailto:dmitry.v.rogozhkin@intel.com" title="Dmitry Rogozhkin <dmitry.v.rogozhkin@intel.com>"> <span class="fn">Dmitry Rogozhkin</span></a>
</span></b>
        <pre>With inline GEN8_R_PWR_CLK_STATE programming we are getting reset of per-slice
registers including MOCS, this can lead to functional and performance
regressions. From the other hand with the i915 KMD level programming we can
reprogram the state we lost. Thus, we probably will follow with the KMD level
slice programming. Here are the related patches:

* <a href="https://patchwork.freedesktop.org/series/29715/">https://patchwork.freedesktop.org/series/29715/</a> - patch series to enable
slice programming for Gen8+ (most recent respin)
* <a href="https://patchwork.freedesktop.org/series/29564/">https://patchwork.freedesktop.org/series/29564/</a> - patch series to fix
conflict with OA NOA programming</pre>
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