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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [BAT][GDG] igt@drv_hangman@error-state-basic incomplete in CI"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101852#c18">Comment # 18</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [BAT][GDG] igt@drv_hangman@error-state-basic incomplete in CI"
href="https://bugs.freedesktop.org/show_bug.cgi?id=101852">bug 101852</a>
from <span class="vcard"><a class="email" href="mailto:ville.syrjala@linux.intel.com" title="Ville Syrjala <ville.syrjala@linux.intel.com>"> <span class="fn">Ville Syrjala</span></a>
</span></b>
<pre>(In reply to Chris Wilson from <a href="show_bug.cgi?id=101852#c17">comment #17</a>)
<span class="quote">> Ok, set both planes to zero, no effect. In __display_resume:
>
> for_each_pipe(dev_priv, pipe) {
> struct intel_crtc *crtc =
> intel_get_crtc_for_pipe(dev_priv, pipe);
> enum plane plane = crtc->plane;
>
> I915_WRITE_FW(DSPCNTR(plane), 0);
> I915_WRITE_FW(DSPADDR(plane), 0);
> }</span >
Hmm. I wonder if gen3 still needs both DPLLs and/or pipes running when moving a
plane between them. That was the case on 830, but I thought it got fixed on 855
already.</pre>
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