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<base href="https://bugs.freedesktop.org/">
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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [CI] igt@pm_rpm@universal-planes-dpms - dmesg-warn - *ERROR* timeout waiting for pcode write of 0x00000001 to mbox 17 to finish for bxt_set_cdclk [i915]"
href="https://bugs.freedesktop.org/show_bug.cgi?id=103326">103326</a>
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<th>Summary</th>
<td>[CI] igt@pm_rpm@universal-planes-dpms - dmesg-warn - *ERROR* timeout waiting for pcode write of 0x00000001 to mbox 17 to finish for bxt_set_cdclk [i915]
</td>
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<th>Product</th>
<td>DRI
</td>
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<th>Version</th>
<td>DRI git
</td>
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<th>Hardware</th>
<td>Other
</td>
</tr>
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<th>OS</th>
<td>All
</td>
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>medium
</td>
</tr>
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<th>Component</th>
<td>DRM/Intel
</td>
</tr>
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<th>Assignee</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr>
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<th>Reporter</th>
<td>marta.lofstedt@intel.com
</td>
</tr>
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<th>QA Contact</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr>
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<th>CC</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr></table>
<p>
<div>
<pre>CI_DRM_3252 APL-shards igt@pm_rpm@universal-planes-dpms dmesg-warn.
<7>[ 43.094632] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting:
hp_ctl:10001818 hp_port:38
<7>[ 43.095839] [drm:__bxt_hpd_detection_setup [i915]] Invert bit setting:
hp_ctl:10001818 hp_port:30
<7>[ 43.095935] [drm:intel_runtime_resume [i915]] Device resumed
<7>[ 43.096147] [drm:intel_runtime_suspend [i915]] Suspending device
<7>[ 43.097049] [drm:gen9_set_dc_state [i915]] Setting DC state from 01 to 00
<3>[ 43.098443] [drm:sandybridge_pcode_write [i915]] *ERROR* timeout waiting
for pcode write of 0x00000001 to mbox 17 to finish for bxt_set_cdclk [i915]
<3>[ 43.098535] [drm:bxt_set_cdclk [i915]] *ERROR* PCode CDCLK freq set
failed, (err -110, freq 19200)
<7>[ 43.098579] [drm:intel_power_well_disable [i915]] disabling power well 1
<7>[ 43.098633] [drm:hsw_power_well_disable [i915]] power well 1 forced on
(bios:1 driver:0 kvmr:0 debug:1)
<7>[ 43.098729] [drm:bxt_enable_dc9 [i915]] Enabling DC9
<7>[ 43.098773] [drm:gen9_set_dc_state [i915]] Setting DC state from 00 to 08
<7>[ 43.098831] [drm:intel_runtime_suspend [i915]] Device suspended
<7>[ 43.122718] [drm:intel_runtime_resume [i915]] Resuming device
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3252/shard-apl6/igt@pm_rpm@universal-planes-dpms.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_3252/shard-apl6/igt@pm_rpm@universal-planes-dpms.html</a></pre>
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