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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - SSEU status is all 0 on BXT"
href="https://bugs.freedesktop.org/show_bug.cgi?id=103484#c7">Comment # 7</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - SSEU status is all 0 on BXT"
href="https://bugs.freedesktop.org/show_bug.cgi?id=103484">bug 103484</a>
from <span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span></b>
<pre>(In reply to Lionel Landwerlin from <a href="show_bug.cgi?id=103484#c6">comment #6</a>)
<span class="quote">> It might be a testimony that we're not doing power management very well on
> some platforms...</span >
Or that those registers are meant to be fw, and we haven't hooked up bxt
correctly?
Hmm.
#define GEN9_SLICE_PGCTL_ACK(slice) _MMIO(0x804c + (slice)*0x4)
static const struct intel_forcewake_range __gen9_fw_ranges[] = {
...
GEN_FW_RANGE(0x8000, 0x812f, FORCEWAKE_BLITTER),
so the register read does require fw. So
diff --git a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 3d91d8a28d9f..56445b06a68c 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -812,7 +812,7 @@ static const struct intel_forcewake_range
__gen9_fw_ranges[] = {
GEN_FW_RANGE(0x3000, 0x3fff, FORCEWAKE_RENDER),
GEN_FW_RANGE(0x4000, 0x51ff, FORCEWAKE_BLITTER),
GEN_FW_RANGE(0x5200, 0x7fff, FORCEWAKE_RENDER),
- GEN_FW_RANGE(0x8000, 0x812f, FORCEWAKE_BLITTER),
+ GEN_FW_RANGE(0x8000, 0x812f, FORCEWAKE_BLITTER | FORCEWAKE_RENDER),
GEN_FW_RANGE(0x8130, 0x813f, FORCEWAKE_MEDIA),
GEN_FW_RANGE(0x8140, 0x815f, FORCEWAKE_RENDER),
GEN_FW_RANGE(0x8160, 0x82ff, FORCEWAKE_BLITTER),
is also sufficient. I'm starting to suspect the domain is wrong here.</pre>
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