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<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - DP@Cherryview → CH7517 → VGA: interlaced modes broken"
href="https://bugs.freedesktop.org/show_bug.cgi?id=103922">103922</a>
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<th>Summary</th>
<td>DP@Cherryview → CH7517 → VGA: interlaced modes broken
</td>
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<th>Product</th>
<td>DRI
</td>
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<th>Version</th>
<td>unspecified
</td>
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<th>Hardware</th>
<td>x86-64 (AMD64)
</td>
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<th>OS</th>
<td>Linux (All)
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<th>Status</th>
<td>NEW
</td>
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<th>Severity</th>
<td>normal
</td>
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<th>Priority</th>
<td>medium
</td>
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<th>Component</th>
<td>DRM/Intel
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<th>Assignee</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
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<th>Reporter</th>
<td>awesome.walrus+bugzilla@gmail.com
</td>
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<th>QA Contact</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
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<th>CC</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr></table>
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<pre>Created <span class=""><a href="attachment.cgi?id=135733" name="attach_135733" title="DRM driver debug output">attachment 135733</a> <a href="attachment.cgi?id=135733&action=edit" title="DRM driver debug output">[details]</a></span>
DRM driver debug output
Attempted upgrading a video source for a full HD screen system (consumes 720p
and 1080i @50/60Hz via VGA→RGBHV cable, previously served by an nVidia Ion
platform for years). The new system is built on Celeron N3150, i.e., uses
Cherryview Braswell (Gen8LP) i915 graphics (PCI ID 8086:22b1, rev 0x21).
Problem: interlaced modes do not work, only progressive do. Specifically, as
found with an oscilloscope, there are no requisite half-lines between odd and
even interlaced fields — vsync start always aligns with hsync start, as opposed
to proper interlaced modes output by the former source, where vsync starts
mid-scanline on every other field, and which work fine. All other timings seem
OK: e.g., half the scanlines configured are used between vsyncs, vsync duration
is also half-long, etc.
More specifics:
- OS: Debian 8.8, kernel 4.13.0-0.bpo.1-amd64 (from stretch-backports);
- the new system has its VGA port appear as “DP2” to the driver; there's also
a CH7517A chip on board (a DisplayPort to VGA translator), which adds up;
- an example problematic mode (tried many, though): Modeline "1920x1080@50i"
74.250 1920 2448 2492 2640 1080 1085 1095 1125 Interlace
- messed with the driver to verify that VSYNCSHIFT gets set to 1128 (for the
mode above) and PIPEACONF gets 0b101 in bits 23:21 (and tried every other way
of requesting interlaced mode via those bits — to no avail);
- debug logging from the driver setting the aforementioned mode is attached.
Is there any hope?</pre>
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