<html> <head> <base href="https://bugs.freedesktop.org/"> </head> <body> <div> <a class="bz_bug_link bz_status_NEW " title="NEW - DP@Cherryview → CH7517 → VGA: interlaced modes broken" href="https://bugs.freedesktop.org/show_bug.cgi?id=103922#c1">Comment # 1</a> on <a class="bz_bug_link bz_status_NEW " title="NEW - DP@Cherryview → CH7517 → VGA: interlaced modes broken" href="https://bugs.freedesktop.org/show_bug.cgi?id=103922">bug 103922</a> from <a class="email" href="mailto:ville.syrjala@linux.intel.com" title="Ville Syrjala <ville.syrjala@linux.intel.com>"> Ville Syrjala</a> <pre>Hmm. Indeed looks like DP+interlaced is totally hosed on CHV (and probably VLV too, perhaps even g4x?). I tested it on an external DP monitor here, and I get very corrupted output. I wasn't able to find anything in the docs suggesting that we're doing anything wrong, nor that we're missing some important register setting. I even found one chicken bit called 'Flip_MSA_vertical_total_in_interlace_mode' which suggests that at least someone gave *some* thought to DP+interlaced in the hardware design. Frobbing with any of the relevant looking bits didn't help. My display does correctly identify the mode as 1080i though, so I assume at least some parts of the MSA packet must be correct.</pre> </div> <hr> You are receiving this mail because: <ul> <li>You are the QA Contact for the bug.</li> <li>You are the assignee for the bug.</li> <li>You are on the CC list for the bug.</li> </ul> </body> </html>