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<body><span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span> changed
<a class="bz_bug_link
bz_status_RESOLVED bz_closed"
title="RESOLVED FIXED - [SKL dmc] Headless mode media transcoding is 20-30% slower comparing to connected monitor use case"
href="https://bugs.freedesktop.org/show_bug.cgi?id=100572">bug 100572</a>
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<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>What</th>
<th>Removed</th>
<th>Added</th>
</tr>
<tr>
<td style="text-align:right;">Resolution</td>
<td>---
</td>
<td>FIXED
</td>
</tr>
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<td style="text-align:right;">Status</td>
<td>REOPENED
</td>
<td>RESOLVED
</td>
</tr></table>
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<b><a class="bz_bug_link
bz_status_RESOLVED bz_closed"
title="RESOLVED FIXED - [SKL dmc] Headless mode media transcoding is 20-30% slower comparing to connected monitor use case"
href="https://bugs.freedesktop.org/show_bug.cgi?id=100572#c46">Comment # 46</a>
on <a class="bz_bug_link
bz_status_RESOLVED bz_closed"
title="RESOLVED FIXED - [SKL dmc] Headless mode media transcoding is 20-30% slower comparing to connected monitor use case"
href="https://bugs.freedesktop.org/show_bug.cgi?id=100572">bug 100572</a>
from <span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span></b>
<pre>commit b68763741aa29f2541c7ca58bcb0c2bb6cb5f449
Author: Tvrtko Ursulin <<a href="mailto:tvrtko.ursulin@intel.com">tvrtko.ursulin@intel.com</a>>
AuthorDate: Tue Dec 5 13:28:54 2017 +0000
Commit: Imre Deak <<a href="mailto:imre.deak@intel.com">imre.deak@intel.com</a>>
CommitDate: Fri Dec 8 12:23:07 2017 +0200
drm/i915: Restore GT performance in headless mode with DMC loaded
It seems that the DMC likes to transition between the DC states a lot when
there are no connected displays (no active power domains) during command
submission.
This activity on DC states has a negative impact on the performance of the
chip with huge latencies observed in the interrupt handlers and elsewhere.
Simple tests like igt/gem_latency -n 0 are slowed down by a factor of
eight.
Work around it by introducing a new power domain named,
POWER_DOMAIN_GT_IRQ, associtated with the "DC off" power well, which is
held for the duration of command submission activity.
CNL has the same problem which will be addressed as a follow-up. Doing
that requires a fix for a DC6 context corruption problem in the CNL DMC
firmware which is yet to be released.
v2:
* Add commit text as comment in i915_gem_mark_busy. (Chris Wilson)
* Protect macro body with braces. (Jani Nikula)
v3:
* Add dedicated power domain for clarity. (Chris, Imre)
* Commit message and comment text updates.
* Apply to all big-core GEN9 parts apart for Skylake which is pending DMC
firmware release.
v4:
* Power domain should be inner to device runtime pm. (Chris)
* Simplify NEEDS_CSR_GT_PERF_WA macro. (Chris)
* Handle async DMC loading by moving the GT_IRQ power domain logic into
intel_runtime_pm. (Daniel, Chris)
* Include small core GEN9 as well. (Imre)
v5
* Special handling for async DMC load is not needed since on failure the
power domain reference is kept permanently taken. (Imre)
v6:
* Drop the NEEDS_CSR_GT_PERF_WA macro since all firmwares have now been
deployed. (Imre, Chris)
Signed-off-by: Tvrtko Ursulin <<a href="mailto:tvrtko.ursulin@intel.com">tvrtko.ursulin@intel.com</a>>
Bugzilla: <a class="bz_bug_link
bz_status_RESOLVED bz_closed"
title="RESOLVED FIXED - [SKL dmc] Headless mode media transcoding is 20-30% slower comparing to connected monitor use case"
href="show_bug.cgi?id=100572">https://bugs.freedesktop.org/show_bug.cgi?id=100572</a>
Testcase: igt/gem_exec_nop/headless
Cc: Imre Deak <<a href="mailto:imre.deak@intel.com">imre.deak@intel.com</a>>
Acked-by: Chris Wilson <<a href="mailto:chris@chris-wilson.co.uk">chris@chris-wilson.co.uk</a>> (v2)
Cc: Chris Wilson <<a href="mailto:chris@chris-wilson.co.uk">chris@chris-wilson.co.uk</a>>
Cc: Dmitry Rogozhkin <<a href="mailto:dmitry.v.rogozhkin@intel.com">dmitry.v.rogozhkin@intel.com</a>>
Reviewed-by: Daniel Vetter <<a href="mailto:daniel.vetter@ffwll.ch">daniel.vetter@ffwll.ch</a>> (v5)
Reviewed-by: Chris Wilson <<a href="mailto:chris@chris-wilson.co.uk">chris@chris-wilson.co.uk</a>>
[Imre: Add note about applying the WA on CNL as a follow-up]
Signed-off-by: Imre Deak <<a href="mailto:imre.deak@intel.com">imre.deak@intel.com</a>>
Link:
<a href="https://patchwork.freedesktop.org/patch/msgid/20171205132854.26380-1-tvrtko.ursulin@linux.intel.com">https://patchwork.freedesktop.org/patch/msgid/20171205132854.26380-1-tvrtko.ursulin@linux.intel.com</a>
Unless we really want to keep this open for cnl?</pre>
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