<html>
<head>
<base href="https://bugs.freedesktop.org/">
</head>
<body><table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>Bug ID</th>
<td><a class="bz_bug_link
bz_status_NEW "
title="NEW - [BAT][GLK only] igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size - *ERROR* CPU pipe A FIFO underrun"
href="https://bugs.freedesktop.org/show_bug.cgi?id=104491">104491</a>
</td>
</tr>
<tr>
<th>Summary</th>
<td>[BAT][GLK only] igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size - *ERROR* CPU pipe A FIFO underrun
</td>
</tr>
<tr>
<th>Product</th>
<td>DRI
</td>
</tr>
<tr>
<th>Version</th>
<td>DRI git
</td>
</tr>
<tr>
<th>Hardware</th>
<td>Other
</td>
</tr>
<tr>
<th>OS</th>
<td>All
</td>
</tr>
<tr>
<th>Status</th>
<td>NEW
</td>
</tr>
<tr>
<th>Severity</th>
<td>normal
</td>
</tr>
<tr>
<th>Priority</th>
<td>medium
</td>
</tr>
<tr>
<th>Component</th>
<td>DRM/Intel
</td>
</tr>
<tr>
<th>Assignee</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr>
<tr>
<th>Reporter</th>
<td>marta.lofstedt@intel.com
</td>
</tr>
<tr>
<th>QA Contact</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr>
<tr>
<th>CC</th>
<td>intel-gfx-bugs@lists.freedesktop.org
</td>
</tr></table>
<p>
<div>
<pre><a href="https://intel-gfx-ci.01.org/tree/drm-tip/IGT_4113/shard-glkb4/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html">https://intel-gfx-ci.01.org/tree/drm-tip/IGT_4113/shard-glkb4/igt@kms_cursor_legacy@basic-flip-before-cursor-varying-size.html</a>
<7>[40087.920681] [IGT] kms_cursor_legacy: starting subtest
basic-flip-before-cursor-varying-size
<7>[40087.920973] [drm:drm_mode_addfb2] [FB:98]
<7>[40087.933596] [drm:gen8_irq_handler [i915]] hotplug event received, stat
0x00000008, dig 0x1a001818, pins 0x00000010
<7>[40087.933639] [drm:intel_hpd_irq_handler [i915]] digital hpd port A - long
<7>[40087.933676] [drm:intel_hpd_irq_handler [i915]] Received HPD interrupt on
PIN 4 - cnt: 1
<7>[40087.933777] [drm:intel_dp_hpd_pulse [i915]] ignoring long hpd on eDP port
A
<3>[40087.934420] [drm:intel_cpu_fifo_underrun_irq_handler [i915]] *ERROR* CPU
pipe A FIFO underrun
<7>[40087.934968] [drm:intel_fbc_underrun_work_fn [i915]] Disabling FBC due to
FIFO underrun.</pre>
</div>
</p>
<hr>
<span>You are receiving this mail because:</span>
<ul>
<li>You are on the CC list for the bug.</li>
<li>You are the QA Contact for the bug.</li>
<li>You are the assignee for the bug.</li>
</ul>
</body>
</html>