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<body><span class="vcard"><a class="email" href="mailto:o.freyermuth@googlemail.com" title="o.freyermuth@googlemail.com">o.freyermuth@googlemail.com</a>
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<a class="bz_bug_link
bz_status_REOPENED "
title="REOPENED - [HSW]i915 does 2s long DP-link-reset (backlight off) during modeset instead of re-using SimpleFB, stacktrace with i915.fastboot=1"
href="https://bugs.freedesktop.org/show_bug.cgi?id=91845">bug 91845</a>
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<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>What</th>
<th>Removed</th>
<th>Added</th>
</tr>
<tr>
<td style="text-align:right;">Status</td>
<td>CLOSED
</td>
<td>REOPENED
</td>
</tr>
<tr>
<td style="text-align:right;">Resolution</td>
<td>INVALID
</td>
<td>---
</td>
</tr></table>
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<div>
<b><a class="bz_bug_link
bz_status_REOPENED "
title="REOPENED - [HSW]i915 does 2s long DP-link-reset (backlight off) during modeset instead of re-using SimpleFB, stacktrace with i915.fastboot=1"
href="https://bugs.freedesktop.org/show_bug.cgi?id=91845#c6">Comment # 6</a>
on <a class="bz_bug_link
bz_status_REOPENED "
title="REOPENED - [HSW]i915 does 2s long DP-link-reset (backlight off) during modeset instead of re-using SimpleFB, stacktrace with i915.fastboot=1"
href="https://bugs.freedesktop.org/show_bug.cgi?id=91845">bug 91845</a>
from <span class="vcard"><a class="email" href="mailto:o.freyermuth@googlemail.com" title="o.freyermuth@googlemail.com">o.freyermuth@googlemail.com</a>
</span></b>
<pre>Sorry for the by far too long delay.
I still observe the issue after updating to 4.14.12.
I'll attach a full dmesg from booting with "pcie_aspm=force drm.debug=0x06",
basically I still see the same:
[ 0.608073] [drm:intelfb_create] re-using BIOS fb
but then...
[ 0.608321] [drm:intel_edp_backlight_off]
[...]
[ 1.823031] [drm:intel_panel_actually_set_backlight] set backlight PWM = 0
[ 1.823037] [drm:lpt_disable_backlight] cpu backlight was enabled, disabling
[ 1.823051] [drm:intel_disable_pipe] disabling pipe A
[ 1.839572] [drm:intel_edp_panel_off] Turn eDP port A panel power off
[ 1.839578] [drm:intel_edp_panel_off] Wait for panel power off time
[ 1.839589] [drm:wait_panel_status] mask b0000000 value 00000000 status
80000008 control 00000000
[ 1.840248] [drm:ilk_hpd_irq_handler] hotplug event received, stat
0x08000000, dig 0x00000011, pins 0x00000010
[ 1.840253] [drm:intel_hpd_irq_handler] digital hpd port A - short
[ 1.840271] [drm:intel_dp_hpd_pulse] got hpd irq on port A - short
[ 1.890256] [drm:wait_panel_status] Wait complete
[ 1.890271] [drm:intel_disable_shared_dpll] disable LCPLL 1350 (active 1,
on? 1) for crtc 36
[ 1.890273] [drm:intel_disable_shared_dpll] disabling LCPLL 1350
[ 1.890283] [drm:intel_atomic_commit_tail] [ENCODER:57:DDI A]
[ 1.890291] [drm:edp_panel_vdd_on] Turning eDP port A VDD on
[ 1.890294] [drm:intel_atomic_commit_tail] [ENCODER:67:DDI C]
[ 1.890298] [drm:wait_panel_power_cycle] Wait for panel power cycle
and only then:
[ 3.138783] [drm:intel_dp_start_link_train] Channel EQ done. DP Training
successful
[ 3.138790] [drm:intel_dp_start_link_train] [CONNECTOR:58:eDP-1] Link
Training Passed at Link Rate = 270000, Lane count = 2
[ 3.138874] [drm:intel_enable_pipe] enabling pipe A
[ 3.139052] [drm:intel_edp_backlight_on]
[ 3.139059] [drm:intel_panel_enable_backlight] pipe A
So for some reason, it seems the panel is fully powercycled on boot, instead of
re-using the existing FB, leaving the screen completely dark for about 2
seconds.</pre>
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