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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - GPU Hang with single-channel RAM configuration"
href="https://bugs.freedesktop.org/show_bug.cgi?id=105064#c2">Comment # 2</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - GPU Hang with single-channel RAM configuration"
href="https://bugs.freedesktop.org/show_bug.cgi?id=105064">bug 105064</a>
from <span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span></b>
<pre>It completed the CS interrupt following seqno 0x00bd22f7, but the context
switch (following ELSP) did not restart on the new context. ~o~ I'm not sure if
a bisect will reveal anything more than a timing change.
Initial guess is that this issue is related to the one fixed in
commit ba74cb10c775c839f6e1d0fabd1e772eabd9c43f
Author: Michel Thierry <<a href="mailto:michel.thierry@intel.com">michel.thierry@intel.com</a>>
Date: Mon Nov 20 12:34:58 2017 +0000
drm/i915/execlists: Delay writing to ELSP until HW has processed the
previou
s write</pre>
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