<html> <head> <base href="https://bugs.freedesktop.org/"> </head> <body> <div> <a class="bz_bug_link bz_status_NEEDINFO " title="NEEDINFO - SSEU status is all 0 on BXT" href="https://bugs.freedesktop.org/show_bug.cgi?id=103484#c13">Comment # 13</a> on <a class="bz_bug_link bz_status_NEEDINFO " title="NEEDINFO - SSEU status is all 0 on BXT" href="https://bugs.freedesktop.org/show_bug.cgi?id=103484">bug 103484</a> from <a class="email" href="mailto:lionel.g.landwerlin@linux.intel.com" title="Lionel Landwerlin <lionel.g.landwerlin@linux.intel.com>"> Lionel Landwerlin</a> <pre>Most of the register that give us the power status of slices/subslices/EUs are named "... Acknowledge". So it sounds like they report the last programmed status. The register setting the slice/subslice/EU powergating state (0x20c8), is only programmable through the RCS. So it would make sense that we need to forcewake render to be able to read a sensible status. That would explain why we see 0s on pretty much all platforms.</pre> </div> <hr> You are receiving this mail because: <ul> <li>You are the assignee for the bug.</li> <li>You are the QA Contact for the bug.</li> <li>You are on the CC list for the bug.</li> </ul> </body> </html>