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<b><a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - [BAT][GVT-d] timeout waiting for SBI to complete read transaction"
href="https://bugs.freedesktop.org/show_bug.cgi?id=99938#c23">Comment # 23</a>
on <a class="bz_bug_link
bz_status_ASSIGNED "
title="ASSIGNED - [BAT][GVT-d] timeout waiting for SBI to complete read transaction"
href="https://bugs.freedesktop.org/show_bug.cgi?id=99938">bug 99938</a>
from <span class="vcard"><a class="email" href="mailto:xiong.y.zhang@intel.com" title="XiongZhang <xiong.y.zhang@intel.com>"> <span class="fn">XiongZhang</span></a>
</span></b>
<pre>LPT pch and LPT_LP pch have different SBI registers, but real pch isn't passed
through to guest in GVT-d, then guest i915 couldn't correctly identify LPT and
LPT_LP pch. Currently guest i915 guess the pch type according to processor
type. This guess may be wrong if ULT/ULX processor with LPT PCH or normal
processor with LPT_LP pch.
In order to fix these corner case, real pch id should be passed from host to
guest, but this isn't a standard, hacker method is needed in QEMU and i915, and
kinds of hacker are rejected by QEMU.</pre>
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