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<b><a class="bz_bug_link
bz_status_NEEDINFO "
title="NEEDINFO - APL: Fails to detect second external monitor after a 4k monitor is attached to DUT"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107113#c3">Comment # 3</a>
on <a class="bz_bug_link
bz_status_NEEDINFO "
title="NEEDINFO - APL: Fails to detect second external monitor after a 4k monitor is attached to DUT"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107113">bug 107113</a>
from <span class="vcard"><a class="email" href="mailto:raviraj.p.sitaram@intel.com" title="Raviraj Sitaram <raviraj.p.sitaram@intel.com>"> <span class="fn">Raviraj Sitaram</span></a>
</span></b>
<pre>@ Vivi rodrigo:
Sorry, my mistake. I gave the commit id's in chromeos-4.4 kernel. Here are the
commit id's from drm-tip.
commit 714244e280de0e4ec00ff18b641f48be3936d920
Author: Ben Widawsky <<a href="mailto:ben@bwidawsk.net">ben@bwidawsk.net</a>>
Date: Tue Aug 1 09:58:16 2017 -0700
drm/i915: Add format modifiers for Intel
commit db1689aa61bd1efb5ce9b896e7aa860a85b7f1b6
Author: Ben Widawsky <<a href="mailto:ben@bwidawsk.net">ben@bwidawsk.net</a>>
Date: Sun Jul 23 20:46:39 2017 -0700
drm: Create a format/modifier blob
I have chosen my words badly. I should not have called out the behavior
regression. The behavior has changed post merging of the above patches. After
merging format modifiers patches, y-tiling instead of x-tiling is being used
resulting in this behavior.
@ Chris wilson
I understand that the user space is where the decision to use y-tiling is made.
That means we can drive at max 1 4k display on the APL platform with y-tiling
enabled without hitting the ddb limits. If that is expected behavior, we can
close the bug and I will document the behavior for any future issues on APL.
I went through the platform specification for display buffer programming. There
are 2 suggested ways of allocating the buffer. First one, the current
implementation, where we fix the buffer allocation per pipe first and then
allocate buffers per plane. A second implementation is also suggested, where
the buffer allocation is done per plane first and remaining buffer to be
divided across pipes. I do not have enough background info on why former
approach has been taken.</pre>
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