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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - [CI][DRMTIP] igt@(gem_mmap_gtt/coherency) - fail - Failed assertion: gtt[1024*i] == ~i"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107862#c1">Comment # 1</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - [CI][DRMTIP] igt@(gem_mmap_gtt/coherency) - fail - Failed assertion: gtt[1024*i] == ~i"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107862">bug 107862</a>
from <span class="vcard"><a class="email" href="mailto:chris@chris-wilson.co.uk" title="Chris Wilson <chris@chris-wilson.co.uk>"> <span class="fn">Chris Wilson</span></a>
</span></b>
<pre>The weird with these is that it looks like buffering on the read; it's not the
write via the GTT being incoherent with the read via WC, in these cases it's
the write via WC not being immediately visible via GTT. That upsets all my
understanding of PCI ordering rules and mental models for how the GTT works.</pre>
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