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<body><span class="vcard"><a class="email" href="mailto:imre.deak@intel.com" title="Imre Deak <imre.deak@intel.com>"> <span class="fn">Imre Deak</span></a>
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<a class="bz_bug_link
bz_status_NEW "
title="NEW - drivers/gpu/drm/i915/intel_uncore.c:1083 __unclaimed_reg_debug - HP Pavilion x360"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107915">bug 107915</a>
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<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>What</th>
<th>Removed</th>
<th>Added</th>
</tr>
<tr>
<td style="text-align:right;">CC</td>
<td>
</td>
<td>ville.syrjala@linux.intel.com
</td>
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<b><a class="bz_bug_link
bz_status_NEW "
title="NEW - drivers/gpu/drm/i915/intel_uncore.c:1083 __unclaimed_reg_debug - HP Pavilion x360"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107915#c1">Comment # 1</a>
on <a class="bz_bug_link
bz_status_NEW "
title="NEW - drivers/gpu/drm/i915/intel_uncore.c:1083 __unclaimed_reg_debug - HP Pavilion x360"
href="https://bugs.freedesktop.org/show_bug.cgi?id=107915">bug 107915</a>
from <span class="vcard"><a class="email" href="mailto:imre.deak@intel.com" title="Imre Deak <imre.deak@intel.com>"> <span class="fn">Imre Deak</span></a>
</span></b>
<pre>Triggered by chv_phy_control_init()/I915_WRITE(DISPLAY_PHY_CONTROL,...) .
According to Ville the register is backed by the 'Display' power well. Not
actually sure why the WARN triggers only sometimes, this power well should be
off whenever we resume from idle.
Len, could you provide a full drm.debug=0x1e log including the WARN with the
following patch applied (based on 4.19.0-rc2):
>From d7065f41143d9826554a11fd26052f6f9110dc9f Mon Sep 17 00:00:00 2001
From: Imre Deak <<a href="mailto:imre.deak@intel.com">imre.deak@intel.com</a>>
Date: Thu, 13 Sep 2018 17:26:58 +0300
Subject: [PATCH] drm/i915: Dump power domains state during init/resume
Signed-off-by: Imre Deak <<a href="mailto:imre.deak@intel.com">imre.deak@intel.com</a>>
---
drivers/gpu/drm/i915/intel_runtime_pm.c | 11 +++++++++--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c
b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 6b5aa3b074ec..4ac88ed3c1a4 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -3528,6 +3528,8 @@ static void vlv_cmnlane_wa(struct drm_i915_private
*dev_priv)
cmn->ops->disable(dev_priv, cmn);
}
+static void intel_power_domains_dump_info(struct drm_i915_private *dev_priv);
+
/**
* intel_power_domains_init_hw - initialize hardware power domain state
* @dev_priv: i915 device instance
@@ -3545,6 +3547,8 @@ void intel_power_domains_init_hw(struct drm_i915_private
*dev_priv, bool resume)
power_domains->initializing = true;
+ intel_power_domains_dump_info(dev_priv);
+
if (IS_ICELAKE(dev_priv)) {
icl_display_core_init(dev_priv, resume);
} else if (IS_CANNONLAKE(dev_priv)) {
@@ -3606,8 +3610,11 @@ static void intel_power_domains_dump_info(struct
drm_i915_private *dev_priv)
for_each_power_well(dev_priv, power_well) {
enum intel_display_power_domain domain;
- DRM_DEBUG_DRIVER("%-25s %d\n",
- power_well->name, power_well->count);
+ DRM_DEBUG_DRIVER("%-25s %d enabled %d\n",
+ power_well->name,
+ power_well->count,
+ power_well->ops->is_enabled(dev_priv,
+ power_well));
for_each_power_domain(domain, power_well->domains)
DRM_DEBUG_DRIVER(" %-23s %d\n",
--
2.13.2</pre>
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