<html> <head> <base href="https://bugs.freedesktop.org/"> </head> <body> <div> <a class="bz_bug_link bz_status_NEW " title="NEW - [CI][DRMTIP] igt@*crc tests* - warn / dmesg-warn - Suspicious CRC: it looks like the CRC read back was from a register in a powered down well" href="https://bugs.freedesktop.org/show_bug.cgi?id=108336#c8">Comment # 8</a> on <a class="bz_bug_link bz_status_NEW " title="NEW - [CI][DRMTIP] igt@*crc tests* - warn / dmesg-warn - Suspicious CRC: it looks like the CRC read back was from a register in a powered down well" href="https://bugs.freedesktop.org/show_bug.cgi?id=108336">bug 108336</a> from <a class="email" href="mailto:stanislav.lisovskiy@intel.com" title="Stanislav Lisovskiy <stanislav.lisovskiy@intel.com>"> Stanislav Lisovskiy</a> <pre>Found one more interesting thing: Sometimes wm levels are written as 0 for all levels, for planes which are currently enabled and have non-zero ddb allocation, which at least looks controversial. This is printed from skl_write_wm_level function, which does the actual write to corresponding watermark level register: 2445.635172] [PLANE:30:plane 1A] ddb (0 - 992) -> (0 - 248) [ 2445.666098] [PLANE:58:plane 5A] ddb (0 - 0) -> (248 - 496) [ 2445.682616] [PLANE:65:plane 6A] ddb (0 - 0) -> (496 - 744) [ 2445.699144] [PLANE:72:plane 7A] ddb (0 - 0) -> (744 - 992) [ 2445.718131] Writing plane 0 level 5 0 blocks while plane or ddb(f8) enabled [ 2445.718133] Writing plane 0 level 6 0 blocks while plane or ddb(f8) enabled [ 2445.739075] Writing plane 0 level 7 0 blocks while plane or ddb(f8) enabled [ 2445.760015] Writing plane 4 level 5 0 blocks while plane or ddb(1f0) enabled [ 2445.780954] Writing plane 4 level 6 0 blocks while plane or ddb(1f0) enabled [ 2445.802147] Writing plane 4 level 7 0 blocks while plane or ddb(1f0) enabled [ 2445.823343] Writing plane 5 level 5 0 blocks while plane or ddb(2e8) enabled [ 2445.844534] Writing plane 5 level 6 0 blocks while plane or ddb(2e8) enabled [ 2445.865725] Writing plane 5 level 7 0 blocks while plane or ddb(2e8) enabled [ 2445.886923] Writing plane 6 level 5 0 blocks while plane or ddb(3e0) enabled [ 2445.908116] Writing plane 6 level 6 0 blocks while plane or ddb(3e0) enabled [ 2445.929306] Writing plane 6 level 7 0 blocks while plane or ddb(3e0) enabled So we are writing 0 blocks for enabled plane, which has non-zero ddb(ddb_y->end in brackets) allocation. I wonder if this is correct at all as ddb allocation currently seems to be calculated based on watermarks, moreover does it even make sense to have 0 wm level blocks and non zero ddb range for that?</pre> </div> <hr> You are receiving this mail because: <ul> <li>You are the QA Contact for the bug.</li> <li>You are on the CC list for the bug.</li> </ul> </body> </html>