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<body><span class="vcard"><a class="email" href="mailto:martin.peres@free.fr" title="Martin Peres <martin.peres@free.fr>"> <span class="fn">Martin Peres</span></a>
</span> changed
<a class="bz_bug_link
bz_status_REOPENED "
title="REOPENED - [CI][DRMTIP] igt@gem_ctx_isolation@rcs0-none - fail - Test assertion failure function compare_regs- Failed assertion: num_errors == 0"
href="https://bugs.freedesktop.org/show_bug.cgi?id=109472">bug 109472</a>
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<table border="1" cellspacing="0" cellpadding="8">
<tr>
<th>What</th>
<th>Removed</th>
<th>Added</th>
</tr>
<tr>
<td style="text-align:right;">Status</td>
<td>RESOLVED
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<td>REOPENED
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<td style="text-align:right;">Resolution</td>
<td>FIXED
</td>
<td>---
</td>
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<b><a class="bz_bug_link
bz_status_REOPENED "
title="REOPENED - [CI][DRMTIP] igt@gem_ctx_isolation@rcs0-none - fail - Test assertion failure function compare_regs- Failed assertion: num_errors == 0"
href="https://bugs.freedesktop.org/show_bug.cgi?id=109472#c5">Comment # 5</a>
on <a class="bz_bug_link
bz_status_REOPENED "
title="REOPENED - [CI][DRMTIP] igt@gem_ctx_isolation@rcs0-none - fail - Test assertion failure function compare_regs- Failed assertion: num_errors == 0"
href="https://bugs.freedesktop.org/show_bug.cgi?id=109472">bug 109472</a>
from <span class="vcard"><a class="email" href="mailto:martin.peres@free.fr" title="Martin Peres <martin.peres@free.fr>"> <span class="fn">Martin Peres</span></a>
</span></b>
<pre>(In reply to Chris Wilson from <a href="show_bug.cgi?id=109472#c1">comment #1</a>)
<span class="quote">> commit 478452fece3997dfacaa4d6babe6b8bf6fef784f
> Author: Chris Wilson <<a href="mailto:chris@chris-wilson.co.uk">chris@chris-wilson.co.uk</a>>
> Date: Mon Jan 7 12:35:27 2019 +0000
>
> i915/gem_ctx_isolation: Ignore the low bits of BB_OFFSET
>
> On Skylake, BB_OFFSET seems to be unstable. Since this is an
> offset into the batch at the time of CS execution, it should be actively
> written to as we read from the register so allow it a qword of
> discrepancy (since the CS should be reading in qwords). This still
> allows us to detect dirt across the rest of the register field, should
> that be required.
>
> v2: restrict ignore_bits to only BIT(2) that we see fluctuate in testing
> (Antonio)
>
> Signed-off-by: Chris Wilson <<a href="mailto:chris@chris-wilson.co.uk">chris@chris-wilson.co.uk</a>>
> Reviewed-by: Antonio Argenziano <<a href="mailto:antonio.argenziano@intel.com">antonio.argenziano@intel.com</a>></span >
Seems like it is still not sufficient:
-
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_215/fi-cfl-guc/igt@gem_ctx_isolation@rcs0-none.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_215/fi-cfl-guc/igt@gem_ctx_isolation@rcs0-none.html</a>
-
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_236/fi-kbl-7560u/igt@gem_ctx_isolation@rcs0-none.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_236/fi-kbl-7560u/igt@gem_ctx_isolation@rcs0-none.html</a></pre>
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