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<b><a class="bz_bug_link
bz_status_CLOSED bz_closed"
title="CLOSED WONTFIX - [CI][SHARDS] igt@kms_plane_alpha_blend@* - fail - Failed assertion: !mismatch (gen8-10)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=108145#c2">Comment # 2</a>
on <a class="bz_bug_link
bz_status_CLOSED bz_closed"
title="CLOSED WONTFIX - [CI][SHARDS] igt@kms_plane_alpha_blend@* - fail - Failed assertion: !mismatch (gen8-10)"
href="https://bugs.freedesktop.org/show_bug.cgi?id=108145">bug 108145</a>
from <span class="vcard"><a class="email" href="mailto:cibuglog@gmail.com" title="CI Bug Log <cibuglog@gmail.com>"> <span class="fn">CI Bug Log</span></a>
</span></b>
<pre>A CI Bug Log filter associated to this bug has been updated:
{- BDW BXT APL SKL GLK KBL CFL WHL CNL: igt@kms_plane_alpha_blend@* - fail -
Failed assertion: !mismatch -}
{+ BDW BXT APL SKL GLK KBL CFL WHL CNL: igt@kms_plane_alpha_blend@* - fail -
Failed assertion: !mismatch +}
New failures caught by the filter:
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-coverage-vs-premult-vs-constant.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-coverage-vs-premult-vs-constant.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-mid.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-mid.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-vs-premult-vs-constant.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-vs-premult-vs-constant.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-mid.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-a-constant-alpha-mid.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_252/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-bxt-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-bxt-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-mid.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-mid.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_253/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_254/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_254/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_254/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_254/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_254/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-mid.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_254/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-mid.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_254/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_254/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_254/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_254/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-b-constant-alpha-mid.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-mid.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-c-constant-alpha-mid.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-glk-dsi/igt@kms_plane_alpha_blend@pipe-a-coverage-vs-premult-vs-constant.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-c-coverage-7efc.html</a>
*
<a href="https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html">https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_255/fi-kbl-r/igt@kms_plane_alpha_blend@pipe-b-coverage-7efc.html</a></pre>
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