<html> <head> <base href="https://bugs.freedesktop.org/"> </head> <body> <div> <a class="bz_bug_link bz_status_NEW " title="NEW - [CI][RESUME] igt@kms_psr@psr2-* fail - Failed assertion: psr_wait_entry_if_enabled(data)" href="https://bugs.freedesktop.org/show_bug.cgi?id=111844#c2">Comment # 2</a> on <a class="bz_bug_link bz_status_NEW " title="NEW - [CI][RESUME] igt@kms_psr@psr2-* fail - Failed assertion: psr_wait_entry_if_enabled(data)" href="https://bugs.freedesktop.org/show_bug.cgi?id=111844">bug 111844</a> from <a class="email" href="mailto:cibuglog@gmail.com" title="CI Bug Log <cibuglog@gmail.com>"> CI Bug Log</a> <pre>The CI Bug Log issue associated to this bug has been updated. ### New filters associated * re-tgl1-display: igt@kms_psr@psr2-* fail - Failed assertion: psr_wait_entry_if_enabled(data) - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_basic.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_basic.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_blt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_blt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_mmap_cpu.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_mmap_cpu.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_mmap_gtt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_mmap_gtt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_plane_move.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_plane_move.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_plane_onoff.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_plane_onoff.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_render.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_cursor_render.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_dpms.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_dpms.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_no_drrs.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_no_drrs.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_primary_blt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_primary_blt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_primary_mmap_cpu.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_primary_mmap_cpu.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_primary_mmap_gtt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_primary_mmap_gtt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_primary_page_flip.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_primary_page_flip.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_primary_render.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_primary_render.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_blt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_blt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_mmap_cpu.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_mmap_cpu.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_mmap_gtt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_mmap_gtt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_plane_move.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_plane_move.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_plane_onoff.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_plane_onoff.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_render.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_sprite_render.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_suspend.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14335/re-tgl-u/igt@kms_psr@psr2_suspend.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_basic.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_basic.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_blt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_blt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_mmap_cpu.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_mmap_cpu.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_mmap_gtt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_mmap_gtt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_plane_move.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_plane_move.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_plane_onoff.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_plane_onoff.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_render.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_cursor_render.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_dpms.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_dpms.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_no_drrs.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_no_drrs.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_primary_blt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_primary_blt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_primary_mmap_cpu.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_primary_mmap_cpu.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_primary_mmap_gtt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_primary_mmap_gtt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_primary_page_flip.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_primary_page_flip.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_primary_render.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_primary_render.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_blt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_blt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_mmap_cpu.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_mmap_cpu.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_mmap_gtt.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_mmap_gtt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_plane_move.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_plane_move.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_plane_onoff.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_plane_onoff.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_render.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_sprite_render.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_suspend.html">https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_14450/re-tgl-u/igt@kms_psr@psr2_suspend.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_basic.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_basic.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_blt.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_blt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_mmap_cpu.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_mmap_cpu.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_mmap_gtt.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_mmap_gtt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_plane_move.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_plane_move.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_plane_onoff.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_plane_onoff.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_render.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_cursor_render.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_dpms.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_dpms.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_no_drrs.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_no_drrs.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_primary_blt.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_primary_blt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_primary_mmap_cpu.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_primary_mmap_cpu.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_primary_mmap_gtt.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_primary_mmap_gtt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_primary_page_flip.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_primary_page_flip.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_primary_render.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_primary_render.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_blt.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_blt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_mmap_cpu.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_mmap_cpu.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_mmap_gtt.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_mmap_gtt.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_plane_move.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_plane_move.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_plane_onoff.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_plane_onoff.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_render.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_sprite_render.html</a> - <a href="https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_suspend.html">https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_6963/re-tgl1-display/igt@kms_psr@psr2_suspend.html</a></pre> </div> <hr> You are receiving this mail because: <ul> <li>You are the assignee for the bug.</li> <li>You are on the CC list for the bug.</li> <li>You are the QA Contact for the bug.</li> </ul> </body> </html>