[PATCH 8/8] HACK/TEST: drm/i915: Check reset in progress flag is set correctly in old platforms

[Michel Thierry]

Trying to figure out these spurious CI warnings
https://intel-gfx-ci.01.org/CI/Trybot_392/fi-ilk-650/igt@gem_ringfill@basic-default-hang.html
https://intel-gfx-ci.01.org/CI/Trybot_392/fi-byt-j1900/igt@gem_ringfill@basic-default-hang.html

[  ] drm/i915: Resetting chip after gpu hang
[  ] [drm:intel_engine_reset_begin [i915]] *ERROR* Engine Reset not supported on Gen5/7
[  ] [drm:i915_reset_engine [i915]] *ERROR* Failed to disable render ring
[  ] drm/i915: Resetting chip after gpu hang

Which imply something strange happened in i915_handle_error, reset_in_progress
flag should have been set for Gen5 there...

Signed-off-by: Michel Thierry <michel.thierry at intel.com>
---
 drivers/gpu/drm/i915/i915_irq.c | 17 ++++++++++++-----
 1 file changed, 12 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index c1932248d5e0..07e2175ddd6c 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2630,11 +2630,18 @@ static void i915_reset_and_wakeup(struct drm_i915_private *dev_priv,
 		struct intel_engine_cs *engine;
 		unsigned int tmp, ret;
 
-		for_each_engine_masked(engine, dev_priv, engine_mask, tmp) {
-			ret = i915_reset_engine(engine);
-			/* on failure we fallback to full gpu reset for recovery */
-			if (ret)
-				break;
+		if (!intel_has_engine_reset(dev_priv)) {
+			DRM_ERROR("XXX: Engine Reset not supported on Gen %d, r_i_p: [%d]\n",
+				  INTEL_INFO(dev_priv)->gen, i915_reset_in_progress(error));
+			/* use full gpu reset to recover on error */
+			set_bit(I915_RESET_IN_PROGRESS, &error->flags);
+		} else {
+			for_each_engine_masked(engine, dev_priv, engine_mask, tmp) {
+				ret = i915_reset_engine(engine);
+				/* on failure we fallback to full gpu reset for recovery */
+				if (ret)
+					break;
+			}
 		}
 	}
 
-- 
2.11.0