[PATCH v5 03/27] drm/i915/slpc: Expose guc functions for use with SLPC
Sagar Arun Kamble
sagar.a.kamble at intel.com
Sat Jul 2 13:50:30 UTC 2016
From: Tom O'Rourke <Tom.O'Rourke at intel.com>
Expose host2guc_action for use by SLPC in intel_slpc.c.
Expose functions to allocate and release objects used
by GuC to be used for SLPC shared memory object.
v5: Updated function names as they need to be made extern. (ChrisW)
Signed-off-by: Tom O'Rourke <Tom.O'Rourke at intel.com>
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
---
drivers/gpu/drm/i915/i915_guc_submission.c | 40 +++++++++++++++---------------
drivers/gpu/drm/i915/intel_guc.h | 4 +++
2 files changed, 24 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_guc_submission.c b/drivers/gpu/drm/i915/i915_guc_submission.c
index 355b647..d633753 100644
--- a/drivers/gpu/drm/i915/i915_guc_submission.c
+++ b/drivers/gpu/drm/i915/i915_guc_submission.c
@@ -47,7 +47,7 @@
* Firmware writes a success/fail code back to the action register after
* processes the request. The kernel driver polls waiting for this update and
* then proceeds.
- * See host2guc_action()
+ * See i915_guc_action()
*
* Doorbells:
* Doorbells are interrupts to uKernel. A doorbell is a single cache line (QW)
@@ -75,7 +75,7 @@ static inline bool host2guc_action_response(struct drm_i915_private *dev_priv,
return GUC2HOST_IS_RESPONSE(val);
}
-static int host2guc_action(struct intel_guc *guc, u32 *data, u32 len)
+int i915_guc_action(struct intel_guc *guc, u32 *data, u32 len)
{
struct drm_i915_private *dev_priv = guc_to_i915(guc);
u32 status;
@@ -135,7 +135,7 @@ static int host2guc_allocate_doorbell(struct intel_guc *guc,
data[0] = HOST2GUC_ACTION_ALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return host2guc_action(guc, data, 2);
+ return i915_guc_action(guc, data, 2);
}
static int host2guc_release_doorbell(struct intel_guc *guc,
@@ -146,7 +146,7 @@ static int host2guc_release_doorbell(struct intel_guc *guc,
data[0] = HOST2GUC_ACTION_DEALLOCATE_DOORBELL;
data[1] = client->ctx_index;
- return host2guc_action(guc, data, 2);
+ return i915_guc_action(guc, data, 2);
}
static int host2guc_sample_forcewake(struct intel_guc *guc,
@@ -163,7 +163,7 @@ static int host2guc_sample_forcewake(struct intel_guc *guc,
/* bit 0 and 1 are for Render and Media domain separately */
data[1] = GUC_FORCEWAKE_RENDER | GUC_FORCEWAKE_MEDIA;
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return i915_guc_action(guc, data, ARRAY_SIZE(data));
}
/*
@@ -607,7 +607,7 @@ int i915_guc_submit(struct drm_i915_gem_request *rq)
*/
/**
- * gem_allocate_guc_obj() - Allocate gem object for GuC usage
+ * i915_guc_allocate_gem_obj() - Allocate gem object for GuC usage
* @dev_priv: driver private data structure
* @size: size of object
*
@@ -617,8 +617,8 @@ int i915_guc_submit(struct drm_i915_gem_request *rq)
*
* Return: A drm_i915_gem_object if successful, otherwise NULL.
*/
-static struct drm_i915_gem_object *
-gem_allocate_guc_obj(struct drm_i915_private *dev_priv, u32 size)
+struct drm_i915_gem_object *
+i915_guc_allocate_gem_obj(struct drm_i915_private *dev_priv, u32 size)
{
struct drm_i915_gem_object *obj;
@@ -644,10 +644,10 @@ gem_allocate_guc_obj(struct drm_i915_private *dev_priv, u32 size)
}
/**
- * gem_release_guc_obj() - Release gem object allocated for GuC usage
+ * i915_guc_release_gem_obj() - Release gem object allocated for GuC usage
* @obj: gem obj to be released
*/
-static void gem_release_guc_obj(struct drm_i915_gem_object *obj)
+void i915_guc_release_gem_obj(struct drm_i915_gem_object *obj)
{
if (!obj)
return;
@@ -682,7 +682,7 @@ guc_client_free(struct drm_i915_private *dev_priv,
kunmap(kmap_to_page(client->client_base));
}
- gem_release_guc_obj(client->client_obj);
+ i915_guc_release_gem_obj(client->client_obj);
if (client->ctx_index != GUC_INVALID_CTX_ID) {
guc_fini_ctx_desc(guc, client);
@@ -773,7 +773,7 @@ guc_client_alloc(struct drm_i915_private *dev_priv,
}
/* The first page is doorbell/proc_desc. Two followed pages are wq. */
- obj = gem_allocate_guc_obj(dev_priv, GUC_DB_SIZE + GUC_WQ_SIZE);
+ obj = i915_guc_allocate_gem_obj(dev_priv, GUC_DB_SIZE + GUC_WQ_SIZE);
if (!obj)
goto err;
@@ -840,7 +840,7 @@ static void guc_create_log(struct intel_guc *guc)
obj = guc->log_obj;
if (!obj) {
- obj = gem_allocate_guc_obj(dev_priv, size);
+ obj = i915_guc_allocate_gem_obj(dev_priv, size);
if (!obj) {
/* logging will be off */
i915.guc_log_level = -1;
@@ -900,7 +900,7 @@ static void guc_create_ads(struct intel_guc *guc)
obj = guc->ads_obj;
if (!obj) {
- obj = gem_allocate_guc_obj(dev_priv, PAGE_ALIGN(size));
+ obj = i915_guc_allocate_gem_obj(dev_priv, PAGE_ALIGN(size));
if (!obj)
return;
@@ -971,7 +971,7 @@ int i915_guc_submission_init(struct drm_i915_private *dev_priv)
if (guc->ctx_pool_obj)
return 0; /* already allocated */
- guc->ctx_pool_obj = gem_allocate_guc_obj(dev_priv, gemsize);
+ guc->ctx_pool_obj = i915_guc_allocate_gem_obj(dev_priv, gemsize);
if (!guc->ctx_pool_obj)
return -ENOMEM;
@@ -1015,15 +1015,15 @@ void i915_guc_submission_fini(struct drm_i915_private *dev_priv)
{
struct intel_guc *guc = &dev_priv->guc;
- gem_release_guc_obj(dev_priv->guc.ads_obj);
+ i915_guc_release_gem_obj(dev_priv->guc.ads_obj);
guc->ads_obj = NULL;
- gem_release_guc_obj(dev_priv->guc.log_obj);
+ i915_guc_release_gem_obj(dev_priv->guc.log_obj);
guc->log_obj = NULL;
if (guc->ctx_pool_obj)
ida_destroy(&guc->ctx_ids);
- gem_release_guc_obj(guc->ctx_pool_obj);
+ i915_guc_release_gem_obj(guc->ctx_pool_obj);
guc->ctx_pool_obj = NULL;
}
@@ -1049,7 +1049,7 @@ int intel_guc_suspend(struct drm_device *dev)
/* first page is shared data with GuC */
data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state);
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return i915_guc_action(guc, data, ARRAY_SIZE(data));
}
@@ -1074,5 +1074,5 @@ int intel_guc_resume(struct drm_device *dev)
/* first page is shared data with GuC */
data[2] = i915_gem_obj_ggtt_offset(ctx->engine[RCS].state);
- return host2guc_action(guc, data, ARRAY_SIZE(data));
+ return i915_guc_action(guc, data, ARRAY_SIZE(data));
}
diff --git a/drivers/gpu/drm/i915/intel_guc.h b/drivers/gpu/drm/i915/intel_guc.h
index 3e3e743..400ca62 100644
--- a/drivers/gpu/drm/i915/intel_guc.h
+++ b/drivers/gpu/drm/i915/intel_guc.h
@@ -157,10 +157,14 @@ extern int intel_guc_suspend(struct drm_device *dev);
extern int intel_guc_resume(struct drm_device *dev);
/* i915_guc_submission.c */
+int i915_guc_action(struct intel_guc *guc, u32 *data, u32 len);
int i915_guc_submission_init(struct drm_i915_private *dev_priv);
int i915_guc_submission_enable(struct drm_i915_private *dev_priv);
int i915_guc_wq_check_space(struct drm_i915_gem_request *rq);
int i915_guc_submit(struct drm_i915_gem_request *rq);
+struct drm_i915_gem_object *
+i915_guc_allocate_gem_obj(struct drm_i915_private *dev_priv, u32 size);
+void i915_guc_release_gem_obj(struct drm_i915_gem_object *obj);
void i915_guc_submission_disable(struct drm_i915_private *dev_priv);
void i915_guc_submission_fini(struct drm_i915_private *dev_priv);
--
1.9.1
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