[PATCH 1/3] drm/i915: Treat Ironlake RC6 like the rest

Chris Wilson chris at chris-wilson.co.uk
Thu Jul 21 18:01:42 UTC 2016


Always use the autoenable worker for enabling RC6 to reduce the number of
special cases we have to consider.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_pm.c | 48 +++++++++++++++++------------------------
 1 file changed, 20 insertions(+), 28 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 64d628c915a3..7c90d4e2b1a1 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -6650,17 +6650,16 @@ static void __intel_autoenable_gt_powersave(struct work_struct *work)
 	if (rcs->last_context)
 		goto out;
 
-	if (!rcs->init_context)
-		goto out;
-
 	mutex_lock(&dev_priv->drm.struct_mutex);
 
 	req = i915_gem_request_alloc(rcs, dev_priv->kernel_context);
 	if (IS_ERR(req))
 		goto unlock;
 
-	if (!i915.enable_execlists && i915_switch_context(req) == 0)
-		rcs->init_context(req);
+	if (!i915.enable_execlists && i915_switch_context(req) == 0) {
+		if (rcs->init_context)
+			rcs->init_context(req);
+	}
 
 	/* Mark the device busy, calling intel_enable_gt_powersave() */
 	i915_add_request_no_flush(req);
@@ -6676,29 +6675,22 @@ void intel_autoenable_gt_powersave(struct drm_i915_private *dev_priv)
 	if (READ_ONCE(dev_priv->rps.enabled))
 		return;
 
-	if (IS_IRONLAKE_M(dev_priv)) {
-		ironlake_enable_drps(dev_priv);
-		mutex_lock(&dev_priv->drm.struct_mutex);
-		intel_init_emon(dev_priv);
-		mutex_unlock(&dev_priv->drm.struct_mutex);
-	} else if (INTEL_INFO(dev_priv)->gen >= 6) {
-		/*
-		 * PCU communication is slow and this doesn't need to be
-		 * done at any specific time, so do this out of our fast path
-		 * to make resume and init faster.
-		 *
-		 * We depend on the HW RC6 power context save/restore
-		 * mechanism when entering D3 through runtime PM suspend. So
-		 * disable RPM until RPS/RC6 is properly setup. We can only
-		 * get here via the driver load/system resume/runtime resume
-		 * paths, so the _noresume version is enough (and in case of
-		 * runtime resume it's necessary).
-		 */
-		if (queue_delayed_work(dev_priv->wq,
-				       &dev_priv->rps.autoenable_work,
-				       round_jiffies_up_relative(HZ)))
-			intel_runtime_pm_get_noresume(dev_priv);
-	}
+	/*
+	 * PCU communication is slow and this doesn't need to be
+	 * done at any specific time, so do this out of our fast path
+	 * to make resume and init faster.
+	 *
+	 * We depend on the HW RC6 power context save/restore
+	 * mechanism when entering D3 through runtime PM suspend. So
+	 * disable RPM until RPS/RC6 is properly setup. We can only
+	 * get here via the driver load/system resume/runtime resume
+	 * paths, so the _noresume version is enough (and in case of
+	 * runtime resume it's necessary).
+	 */
+	if (queue_delayed_work(dev_priv->wq,
+			       &dev_priv->rps.autoenable_work,
+			       round_jiffies_up_relative(HZ)))
+		intel_runtime_pm_get_noresume(dev_priv);
 }
 
 static void ibx_init_clock_gating(struct drm_device *dev)
-- 
2.8.1



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