[PATCH 2/2] debug

[Ander Conselvan de Oliveira]

---
 drivers/gpu/drm/i915/intel_dpll_mgr.c | 28 ++++++++++++++++++++++++++--
 1 file changed, 26 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index a3293cf..873a970 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -41,6 +41,28 @@ intel_get_shared_dpll_id(struct drm_i915_private *dev_priv,
 	return (enum intel_dpll_id) (pll - dev_priv->shared_dplls);
 }
 
+static void
+intel_shared_dpll_config_get(struct intel_shared_dpll_config *config,
+			     struct intel_shared_dpll *pll,
+			     struct intel_crtc *crtc)
+{
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	enum intel_dpll_id id = intel_get_shared_dpll_id(dev_priv, pll);
+
+	config[id].crtc_mask |= 1 << crtc->pipe;
+}
+
+static void
+intel_shared_dpll_config_put(struct intel_shared_dpll_config *config,
+			     struct intel_shared_dpll *pll,
+			     struct intel_crtc *crtc)
+{
+	struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
+	enum intel_dpll_id id = intel_get_shared_dpll_id(dev_priv, pll);
+
+	config[id].crtc_mask &= ~(1 << crtc->pipe);
+}
+
 /* For ILK+ */
 void assert_shared_dpll(struct drm_i915_private *dev_priv,
 			struct intel_shared_dpll *pll,
@@ -217,6 +239,8 @@ intel_reference_shared_dpll(struct intel_shared_dpll *pll,
 
 	shared_dpll = intel_atomic_get_shared_dpll_state(crtc_state->base.state);
 
+	DRM_DEBUG_KMS("crtc_mask %8x\n", shared_dpll[i].crtc_mask);
+
 	if (shared_dpll[i].crtc_mask == 0)
 		shared_dpll[i].hw_state =
 			crtc_state->dpll_hw_state;
@@ -225,7 +249,7 @@ intel_reference_shared_dpll(struct intel_shared_dpll *pll,
 	DRM_DEBUG_DRIVER("using %s for pipe %c\n", pll->name,
 			 pipe_name(crtc->pipe));
 
-	shared_dpll[pll->id].crtc_mask |= 1 << crtc->pipe;
+	intel_shared_dpll_config_get(shared_dpll, pll, crtc);
 }
 
 void intel_shared_dpll_commit(struct drm_atomic_state *state)
@@ -1781,5 +1805,5 @@ void intel_release_shared_dpll(struct intel_crtc *crtc,
 	shared_dpll_config =
 		intel_atomic_get_shared_dpll_state(crtc_state->base.state);
 
-	shared_dpll_config[dpll->id].crtc_mask &= ~(1 << crtc->pipe);
+	intel_shared_dpll_config_put(shared_dpll_config, dpll, crtc);
 }
-- 
2.5.5