✓ Fi.CI.BAT: success for series starting with [01/26] drm/i915: Mark CPU cache as dirty on every transition for CPU writes

[Patchwork]

== Series Details ==

Series: series starting with [01/26] drm/i915: Mark CPU cache as dirty on every transition for CPU writes
URL   : https://patchwork.freedesktop.org/series/23044/
State : success

== Summary ==

Series 23044v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/23044/revisions/1/mbox/

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time:430s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time:421s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time:577s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:504s
fi-bxt-t5700     total:278  pass:258  dwarn:0   dfail:0   fail:0   skip:20  time:557s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time:478s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:488s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:406s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:411s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time:427s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:483s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:467s
fi-kbl-7500u     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:451s
fi-kbl-7560u     total:278  pass:267  dwarn:1   dfail:0   fail:0   skip:10  time:568s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:458s
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17  time:568s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time:456s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:491s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time:428s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:545s
fi-snb-2600      total:278  pass:249  dwarn:0   dfail:0   fail:0   skip:29  time:409s

0a54b7fee9ecda9257d34e5c3ac8de6516a60a90 drm-tip: 2017y-04m-13d-19h-12m-59s UTC integration manifest
2d3f5bc drm/i915/scheduler: Support user-defined priorities
6ef758a drm/i915: Async GPU relocation processing
7a4ee5d drm/i915: Allow execbuffer to use the first object as the batch
062d43e drm/i915: Wait upon userptr get-user-pages within execbuffer
7cd1351 drm/i915: First try the previous execbuffer location
942831d drm/i915: Eliminate lots of iterations over the execobjects array
ed0e929 drm/i915: Pass vma to relocate entry
63df066 drm/i915: Store a direct lookup from object handle to vma
1417ef6 drm/i915: Split vma exec_link/evict_link
f61bb3d0 drm/i915: Use vma->exec_entry as our double-entry placeholder
e897250 drm/i915: Amalgamate execbuffer parameter structures
6bde323 drm/i915: Copy user requested buffers into the error state
c7c835c drm/i915: Reinstate reservation_object zapping for batch_pool objects
38e4404 drm/i915: Don't mark an execlists context-switch when idle
eb5171f drm/i915/execlists: Pack the count into the low bits of the port.request
ec72f87 drm/i915: Only report a wakeup if the waiter was truly asleep
57c9d51 drm/i915: Switch the global i915.semaphores check to a local predicate
9ea40b7 drm/i915: Do not record a successful syncpoint for a dma-await
f41d4bd drm/i915: Confirm the request is still active before adding it to the await
56b8567 drm/i915: Rename intel_timeline.sync_seqno[] to .global_sync[]
999a91b drm/i915: Squash repeated awaits on the same fence
851456a drm/i915: Redefine ptr_pack_bits() and friends
c5eae79 drm/i915: Make ptr_unpack_bits() more function-like
e4017be drm/i915: Lift timeline ordering to await_dma_fence
263d92b drm/i915: Mark up clflushes as belonging to an unordered timeline
ae95a87 drm/i915: Mark CPU cache as dirty on every transition for CPU writes

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Trybot_738/