✗ Fi.CI.BAT: failure for series starting with [01/30] drm/i915: Differentiate between sw write location into ring and last hw read
Patchwork
patchwork at emeril.freedesktop.org
Sun Apr 23 14:40:58 UTC 2017
== Series Details ==
Series: series starting with [01/30] drm/i915: Differentiate between sw write location into ring and last hw read
URL : https://patchwork.freedesktop.org/series/23401/
State : failure
== Summary ==
Series 23401v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/23401/revisions/1/mbox/
Test gem_ctx_switch:
Subgroup basic-default:
pass -> INCOMPLETE (fi-skl-6700hq)
Test gem_exec_flush:
Subgroup basic-batch-kernel-default-uc:
fail -> PASS (fi-snb-2600) fdo#100007
fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007
fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time:427s
fi-bdw-gvtdvm total:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:420s
fi-bsw-n3050 total:278 pass:242 dwarn:0 dfail:0 fail:0 skip:36 time:570s
fi-byt-j1900 total:278 pass:254 dwarn:0 dfail:0 fail:0 skip:24 time:479s
fi-byt-n2820 total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:482s
fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:415s
fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:403s
fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time:415s
fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:495s
fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:491s
fi-skl-6700hq total:21 pass:20 dwarn:0 dfail:0 fail:0 skip:0
fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time:458s
fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:426s
fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:529s
fi-snb-2600 total:278 pass:249 dwarn:0 dfail:0 fail:0 skip:29 time:412s
bc781a3cf9a80e4c5ed0d47fd0c67923bcfcdf2c drm-tip: 2017y-04m-22d-08h-49m-55s UTC integration manifest
abf617a drm/i915/scheduler: Support user-defined priorities
d1ac242 drm/i915: Async GPU relocation processing
ae79244 drm/i915: Allow execbuffer to use the first object as the batch
5cafea5 drm/i915: Wait upon userptr get-user-pages within execbuffer
b7cf4ce drm/i915: First try the previous execbuffer location
7913cce drm/i915: Eliminate lots of iterations over the execobjects array
cd8a345 drm/i915: Pass vma to relocate entry
3165194 drm/i915: Store a direct lookup from object handle to vma
0ca223a drm/i915: Split vma exec_link/evict_link
9620e91 drm/i915: Use vma->exec_entry as our double-entry placeholder
8da5a43 drm/i915: Amalgamate execbuffer parameter structures
a0b180d drm/i915: Reinstate reservation_object zapping for batch_pool objects
ff9b828a drm/i915: Split execlist priority queue into rbtree + linked list
0674d0b drm/i915: Don't mark an execlists context-switch when idle
3c88506 drm/i915/execlists: Pack the count into the low bits of the port.request
ab35250 drm/i915: Switch the global i915.semaphores check to a local predicate
d294bfa drm/i915: Do not record a successful syncpoint for a dma-await
a25942d drm/i915: Rename intel_timeline.sync_seqno[] to .global_sync[]
e3954e9 drm/i915: Squash repeated awaits on the same fence
3286e79 drm/i915: Redefine ptr_pack_bits() and friends
74b4273 drm/i915: Make ptr_unpack_bits() more function-like
3f7b4b8 drm/i915: Lift timeline ordering to await_dma_fence
927a69b drm/i915: Unwrap top level fence-array
ab42011 drm/i915: Mark up clflushes as belonging to an unordered timeline
23540c7 drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty
43dd317 drm/i915: Mark CPU cache as dirty on every transition for CPU writes
054a6f2 drm/i915: Include interesting seqno in the missed breadcrumb debug
78ba1d8 drm/i915: Compute the ring->space slightly less pessimistically
261c72a drm/i915: Poison the request before emitting commands
ef5636f drm/i915: Differentiate between sw write location into ring and last hw read
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Trybot_767/
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