✓ Fi.CI.BAT: success for series starting with [01/30] drm/i915: Differentiate between sw write location into ring and last hw read

[Patchwork]

== Series Details ==

Series: series starting with [01/30] drm/i915: Differentiate between sw write location into ring and last hw read
URL   : https://patchwork.freedesktop.org/series/23416/
State : success

== Summary ==

Series 23416v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/23416/revisions/1/mbox/

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time:425s
fi-bdw-gvtdvm    total:278  pass:256  dwarn:8   dfail:0   fail:0   skip:14  time:426s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time:570s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time:485s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:483s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:409s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:405s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time:413s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:493s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:488s
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17  time:575s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time:458s
fi-skl-gvtdvm    total:278  pass:265  dwarn:0   dfail:0   fail:0   skip:13  time:421s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:534s
fi-snb-2600      total:278  pass:248  dwarn:0   dfail:0   fail:1   skip:29  time:399s

bc781a3cf9a80e4c5ed0d47fd0c67923bcfcdf2c drm-tip: 2017y-04m-22d-08h-49m-55s UTC integration manifest
7e1d9eb drm/i915/scheduler: Support user-defined priorities
ea67c1f drm/i915: Async GPU relocation processing
2c00fd5 drm/i915: Allow execbuffer to use the first object as the batch
d4599b8 drm/i915: Wait upon userptr get-user-pages within execbuffer
d1cf692 drm/i915: First try the previous execbuffer location
b8c403b drm/i915: Eliminate lots of iterations over the execobjects array
408397b drm/i915: Pass vma to relocate entry
a33da8a drm/i915: Store a direct lookup from object handle to vma
d6c9359 drm/i915: Split vma exec_link/evict_link
c3b9dd2 drm/i915: Use vma->exec_entry as our double-entry placeholder
087754f drm/i915: Amalgamate execbuffer parameter structures
7191723 drm/i915: Reinstate reservation_object zapping for batch_pool objects
f1eabf7 drm/i915: Split execlist priority queue into rbtree + linked list
4f4aca7 drm/i915: Don't mark an execlists context-switch when idle
92ca608 drm/i915/execlists: Pack the count into the low bits of the port.request
e2cb194 drm/i915: Switch the global i915.semaphores check to a local predicate
1951afc drm/i915: Do not record a successful syncpoint for a dma-await
c99ce36 drm/i915: Rename intel_timeline.sync_seqno[] to .global_sync[]
1bda692 drm/i915: Squash repeated awaits on the same fence
8f2de07 drm/i915: Redefine ptr_pack_bits() and friends
bd33e63 drm/i915: Make ptr_unpack_bits() more function-like
b83e900 drm/i915: Lift timeline ordering to await_dma_fence
5bbffcf drm/i915: Unwrap top level fence-array
1576e5f drm/i915: Mark up clflushes as belonging to an unordered timeline
3c435f8 drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty
f6bea0f drm/i915: Mark CPU cache as dirty on every transition for CPU writes
f92ace2 drm/i915: Include interesting seqno in the missed breadcrumb debug
9563d3f drm/i915: Compute the ring->space slightly less pessimistically
0bc2c33 drm/i915: Poison the request before emitting commands
e8f39e0 drm/i915: Differentiate between sw write location into ring and last hw read

== Logs ==

For more details see: https://intel-gfx-ci.01.org/CI/Trybot_773/