[PATCH 33/36] drm/i915: Remove the extraneous irqreturn_t from gen8 sub handlers
Chris Wilson
chris at chris-wilson.co.uk
Sat Apr 29 11:44:34 UTC 2017
We know whether or not the irq was intended for us by simpling
inspecting the GEN8_MASTER_IRQ. If that wasn't signaled, the irq was
spurious and that is when, and only when, we should report to the core
that we didn't handle the irq.
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
drivers/gpu/drm/i915/i915_irq.c | 51 +++++++++++++----------------------------
1 file changed, 16 insertions(+), 35 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index af573328e9a6..24c0c79f7cfd 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1374,52 +1374,43 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, u32 iir, int test_shift)
tasklet_hi_schedule(&engine->irq_tasklet);
}
-static irqreturn_t gen8_gt_irq_ack(struct drm_i915_private *dev_priv,
- u32 master_ctl,
- u32 gt_iir[4])
+static void gen8_gt_irq_ack(struct drm_i915_private *dev_priv,
+ u32 master_ctl, u32 gt_iir[4])
{
- irqreturn_t ret = IRQ_NONE;
-
if (master_ctl & (GEN8_GT_RCS_IRQ | GEN8_GT_BCS_IRQ)) {
gt_iir[0] = I915_READ_FW(GEN8_GT_IIR(0));
- if (gt_iir[0]) {
+ if (likely(gt_iir[0]))
I915_WRITE_FW(GEN8_GT_IIR(0), gt_iir[0]);
- ret = IRQ_HANDLED;
- } else
+ else
DRM_ERROR("The master control interrupt lied (GT0)!\n");
}
if (master_ctl & (GEN8_GT_VCS1_IRQ | GEN8_GT_VCS2_IRQ)) {
gt_iir[1] = I915_READ_FW(GEN8_GT_IIR(1));
- if (gt_iir[1]) {
+ if (likely(gt_iir[1]))
I915_WRITE_FW(GEN8_GT_IIR(1), gt_iir[1]);
- ret = IRQ_HANDLED;
- } else
+ else
DRM_ERROR("The master control interrupt lied (GT1)!\n");
}
if (master_ctl & GEN8_GT_VECS_IRQ) {
gt_iir[3] = I915_READ_FW(GEN8_GT_IIR(3));
- if (gt_iir[3]) {
+ if (likely(gt_iir[3]))
I915_WRITE_FW(GEN8_GT_IIR(3), gt_iir[3]);
- ret = IRQ_HANDLED;
- } else
+ else
DRM_ERROR("The master control interrupt lied (GT3)!\n");
}
if (master_ctl & (GEN8_GT_PM_IRQ | GEN8_GT_GUC_IRQ)) {
gt_iir[2] = I915_READ_FW(GEN8_GT_IIR(2));
- if (gt_iir[2] & (dev_priv->pm_rps_events |
- dev_priv->pm_guc_events)) {
+ if (likely(gt_iir[2] & (dev_priv->pm_rps_events |
+ dev_priv->pm_guc_events)))
I915_WRITE_FW(GEN8_GT_IIR(2),
gt_iir[2] & (dev_priv->pm_rps_events |
dev_priv->pm_guc_events));
- ret = IRQ_HANDLED;
- } else
+ else
DRM_ERROR("The master control interrupt lied (PM)!\n");
}
-
- return ret;
}
static void gen8_gt_irq_handler(struct drm_i915_private *dev_priv,
@@ -2460,10 +2451,9 @@ static void bxt_hpd_irq_handler(struct drm_i915_private *dev_priv,
intel_hpd_irq_handler(dev_priv, pin_mask, long_mask);
}
-static irqreturn_t
+static void
gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
{
- irqreturn_t ret = IRQ_NONE;
u32 iir;
enum pipe pipe;
@@ -2471,13 +2461,11 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
iir = I915_READ(GEN8_DE_MISC_IIR);
if (iir) {
I915_WRITE(GEN8_DE_MISC_IIR, iir);
- ret = IRQ_HANDLED;
if (iir & GEN8_DE_MISC_GSE)
intel_opregion_asle_intr(dev_priv);
else
DRM_ERROR("Unexpected DE Misc interrupt\n");
- }
- else
+ } else
DRM_ERROR("The master control interrupt lied (DE MISC)!\n");
}
@@ -2488,7 +2476,6 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
bool found = false;
I915_WRITE(GEN8_DE_PORT_IIR, iir);
- ret = IRQ_HANDLED;
tmp_mask = GEN8_AUX_CHANNEL_A;
if (INTEL_INFO(dev_priv)->gen >= 9)
@@ -2541,7 +2528,6 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
continue;
}
- ret = IRQ_HANDLED;
I915_WRITE(GEN8_DE_PIPE_IIR(pipe), iir);
if (iir & GEN8_PIPE_VBLANK &&
@@ -2585,8 +2571,6 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
iir = I915_READ(SDEIIR);
if (iir) {
I915_WRITE(SDEIIR, iir);
- ret = IRQ_HANDLED;
-
if (HAS_PCH_SPT(dev_priv) || HAS_PCH_KBP(dev_priv))
spt_irq_handler(dev_priv, iir);
else
@@ -2599,8 +2583,6 @@ gen8_de_irq_handler(struct drm_i915_private *dev_priv, u32 master_ctl)
DRM_DEBUG_DRIVER("The master control interrupt lied (SDE)!\n");
}
}
-
- return ret;
}
#define GEN8_GT_IRQ_BITS (GEN8_GT_RCS_IRQ | GEN8_GT_BCS_IRQ | \
@@ -2611,7 +2593,6 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
{
struct drm_i915_private *dev_priv = arg;
u32 master_ctl, gt_iir[4];
- irqreturn_t ret = IRQ_NONE;
if (!intel_irqs_enabled(dev_priv))
return IRQ_NONE;
@@ -2624,11 +2605,11 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
/* Find, clear, then process each source of interrupt */
if (master_ctl & GEN8_GT_IRQ_BITS)
- ret |= gen8_gt_irq_ack(dev_priv, master_ctl, gt_iir);
+ gen8_gt_irq_ack(dev_priv, master_ctl, gt_iir);
if (master_ctl & ~GEN8_GT_IRQ_BITS) {
disable_rpm_wakeref_asserts(dev_priv);
- ret |= gen8_de_irq_handler(dev_priv, master_ctl);
+ gen8_de_irq_handler(dev_priv, master_ctl);
enable_rpm_wakeref_asserts(dev_priv);
}
@@ -2637,7 +2618,7 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
if (master_ctl & GEN8_GT_IRQ_BITS)
gen8_gt_irq_handler(dev_priv, master_ctl, gt_iir);
- return ret;
+ return IRQ_HANDLED;
}
/**
--
2.11.0
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