[PATCH 01/27] drm/i915: Flush indirect GTT writes upon runtime-suspend

Chris Wilson chris at chris-wilson.co.uk
Wed Aug 30 11:14:12 UTC 2017


Our assumption is that indirect writes via the GTT are naturally flushed
when we enter runtime suspend. However, from the look of bxt in our CI,
this is not true and so we must apply our trick of doing a mmio to
serialise the writes.

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_gem.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index e4cc08bc518c..b64eb7d0fb93 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2022,6 +2022,7 @@ i915_gem_release_mmap(struct drm_i915_gem_object *obj)
 void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv)
 {
 	struct drm_i915_gem_object *obj, *on;
+	unsigned long flags;
 	int i;
 
 	/*
@@ -2062,6 +2063,17 @@ void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv)
 		GEM_BUG_ON(!list_empty(&reg->vma->obj->userfault_link));
 		reg->dirty = true;
 	}
+
+	spin_lock_irqsave(&dev_priv->uncore.lock, flags);
+	POSTING_READ_FW(RING_ACTHD(dev_priv->engine[RCS]->mmio_base));
+	spin_unlock_irqrestore(&dev_priv->uncore.lock, flags);
+
+	list_for_each_entry(obj, &dev_priv->mm.bound_list, global_link) {
+		if (obj->base.read_domains & I915_GEM_DOMAIN_GTT) {
+			obj->base.read_domains &= ~I915_GEM_DOMAIN_GTT;
+			obj->base.write_domain &= ~I915_GEM_DOMAIN_GTT;
+		}
+	}
 }
 
 static int i915_gem_object_create_mmap_offset(struct drm_i915_gem_object *obj)
-- 
2.14.1



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