[PATCH] drm/i915: vblank-psr-dmc
Dhinakaran Pandiyan
dhinakaran.pandiyan at gmail.com
Wed Dec 6 09:46:33 UTC 2017
Signed-off-by: Dhinakaran Pandiyan <dhinakaran.pandiyan at intel.com>
---
drivers/gpu/drm/drm_vblank.c | 53 ++++++++++----
drivers/gpu/drm/i915/i915_debugfs.c | 2 +-
drivers/gpu/drm/i915/i915_drv.h | 7 +-
drivers/gpu/drm/i915/i915_irq.c | 4 ++
drivers/gpu/drm/i915/intel_drv.h | 3 +-
drivers/gpu/drm/i915/intel_dsi.c | 2 +-
drivers/gpu/drm/i915/intel_runtime_pm.c | 118 +++++++++++++++++++++++++++++---
include/drm/drm_vblank.h | 1 +
8 files changed, 164 insertions(+), 26 deletions(-)
diff --git a/drivers/gpu/drm/drm_vblank.c b/drivers/gpu/drm/drm_vblank.c
index 32d9bcf5be7f..5c24df99318d 100644
--- a/drivers/gpu/drm/drm_vblank.c
+++ b/drivers/gpu/drm/drm_vblank.c
@@ -338,6 +338,14 @@ void drm_vblank_disable_and_save(struct drm_device *dev, unsigned int pipe)
struct drm_vblank_crtc *vblank = &dev->vblank[pipe];
unsigned long irqflags;
+ /*
+ * Only disable vblank interrupts if they're enabled. This avoids
+ * calling the ->disable_vblank() operation in atomic context with the
+ * hardware potentially runtime suspended.
+ */
+ if (!vblank->enabled)
+ return;
+
assert_spin_locked(&dev->vbl_lock);
/* Prevent vblank irq processing while disabling vblank irqs,
@@ -347,23 +355,14 @@ void drm_vblank_disable_and_save(struct drm_device *dev, unsigned int pipe)
spin_lock_irqsave(&dev->vblank_time_lock, irqflags);
/*
- * Only disable vblank interrupts if they're enabled. This avoids
- * calling the ->disable_vblank() operation in atomic context with the
- * hardware potentially runtime suspended.
- */
- if (vblank->enabled) {
- __disable_vblank(dev, pipe);
- vblank->enabled = false;
- }
-
- /*
- * Always update the count and timestamp to maintain the
+ * Update the count and timestamp to maintain the
* appearance that the counter has been ticking all along until
* this time. This makes the count account for the entire time
* between drm_crtc_vblank_on() and drm_crtc_vblank_off().
*/
drm_update_vblank_count(dev, pipe, false);
-
+ __disable_vblank(dev, pipe);
+ vblank->enabled = false;
spin_unlock_irqrestore(&dev->vblank_time_lock, irqflags);
}
@@ -1235,6 +1234,36 @@ void drm_crtc_vblank_on(struct drm_crtc *crtc)
}
EXPORT_SYMBOL(drm_crtc_vblank_on);
+void drm_crtc_vblank_restore(struct drm_device *dev, unsigned int pipe)
+{
+ ktime_t t_vblank;
+ struct drm_vblank_crtc *vblank;
+ int framedur_ns;
+ u64 diff_ns;
+ u32 cur_vblank, diff = 1;
+ int count = DRM_TIMESTAMP_MAXRETRIES;
+
+ if (WARN_ON(pipe >= dev->num_crtcs))
+ return;
+
+ vblank = &dev->vblank[pipe];
+ framedur_ns = vblank->framedur_ns;
+
+ do {
+ cur_vblank = __get_vblank_counter(dev, pipe);
+ drm_get_last_vbltimestamp(dev, pipe, &t_vblank, false);
+ } while (cur_vblank != __get_vblank_counter(dev, pipe) && --count > 0);
+
+ diff_ns = ktime_to_ns(ktime_sub(t_vblank, vblank->time));
+ if (framedur_ns)
+ diff = DIV_ROUND_CLOSEST_ULL(diff_ns, framedur_ns);
+
+ DRM_DEBUG_VBL("computing missed vblanks (%lld/%d)=%d after hw counter reset hw_last=%u->hw=%u\n",
+ diff_ns, framedur_ns, diff, vblank->last, cur_vblank);
+ store_vblank(dev, pipe, diff, t_vblank, cur_vblank);
+}
+EXPORT_SYMBOL(drm_crtc_vblank_restore);
+
static void drm_legacy_vblank_pre_modeset(struct drm_device *dev,
unsigned int pipe)
{
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 28294470ae31..2a4ed54688d7 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -2805,7 +2805,7 @@ static int i915_power_domain_info(struct seq_file *m, void *unused)
for_each_power_domain(power_domain, power_well->domains)
seq_printf(m, " %-23s %d\n",
intel_display_power_domain_str(power_domain),
- power_domains->domain_use_count[power_domain]);
+ atomic_read(&power_domains->domain_use_count[power_domain]));
}
mutex_unlock(&power_domains->lock);
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index 594fd14e66c5..ba9107ec1ed1 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -397,6 +397,7 @@ enum intel_display_power_domain {
POWER_DOMAIN_AUX_C,
POWER_DOMAIN_AUX_D,
POWER_DOMAIN_GMBUS,
+ POWER_DOMAIN_VBLANK,
POWER_DOMAIN_MODESET,
POWER_DOMAIN_INIT,
@@ -1475,6 +1476,10 @@ struct i915_power_well {
bool has_vga:1;
bool has_fuses:1;
} hsw;
+ struct {
+ spinlock_t lock;
+ bool was_disabled;
+ } dc_off;
};
const struct i915_power_well_ops *ops;
};
@@ -1489,7 +1494,7 @@ struct i915_power_domains {
int power_well_count;
struct mutex lock;
- int domain_use_count[POWER_DOMAIN_NUM];
+ atomic_t domain_use_count[POWER_DOMAIN_NUM];
struct i915_power_well *power_wells;
};
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 7cac07db89b9..c595b934e2dc 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -2964,6 +2964,9 @@ static int gen8_enable_vblank(struct drm_device *dev, unsigned int pipe)
struct drm_i915_private *dev_priv = to_i915(dev);
unsigned long irqflags;
+ if (intel_display_power_vblank_get(dev_priv))
+ drm_crtc_vblank_restore(dev, pipe);
+
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
bdw_enable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
@@ -3015,6 +3018,7 @@ static void gen8_disable_vblank(struct drm_device *dev, unsigned int pipe)
spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
bdw_disable_pipe_irq(dev_priv, pipe, GEN8_PIPE_VBLANK);
spin_unlock_irqrestore(&dev_priv->irq_lock, irqflags);
+ intel_display_power_vblank_put(dev_priv);
}
static void ibx_irq_reset(struct drm_i915_private *dev_priv)
diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
index 30f791f89d64..93ca503f18bb 100644
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -1865,7 +1865,8 @@ void chv_phy_powergate_lanes(struct intel_encoder *encoder,
bool override, unsigned int mask);
bool chv_phy_powergate_ch(struct drm_i915_private *dev_priv, enum dpio_phy phy,
enum dpio_channel ch, bool override);
-
+bool intel_display_power_vblank_get(struct drm_i915_private *dev_priv);
+void intel_display_power_vblank_put(struct drm_i915_private *dev_priv);
/* intel_pm.c */
void intel_init_clock_gating(struct drm_i915_private *dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_dsi.c b/drivers/gpu/drm/i915/intel_dsi.c
index 1b60df3c14a0..f67d321376e4 100644
--- a/drivers/gpu/drm/i915/intel_dsi.c
+++ b/drivers/gpu/drm/i915/intel_dsi.c
@@ -1670,7 +1670,7 @@ static int intel_dsi_get_panel_orientation(struct intel_connector *connector)
{
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
int orientation = DRM_MODE_PANEL_ORIENTATION_NORMAL;
- enum plane plane;
+ enum i9xx_plane_id plane;
u32 val;
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 8315499452dc..65b18a5dc5a5 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -126,6 +126,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain)
return "AUX_D";
case POWER_DOMAIN_GMBUS:
return "GMBUS";
+ case POWER_DOMAIN_VBLANK:
+ return "VBLANK";
case POWER_DOMAIN_INIT:
return "INIT";
case POWER_DOMAIN_MODESET:
@@ -196,10 +198,17 @@ bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
if (power_well->always_on)
continue;
- if (!power_well->hw_enabled) {
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_lock(&power_well->dc_off.lock);
+
+ if (!power_well->hw_enabled)
is_enabled = false;
+
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_unlock(&power_well->dc_off.lock);
+
+ if (!is_enabled)
break;
- }
}
return is_enabled;
@@ -724,6 +733,7 @@ static void gen9_dc_off_power_well_disable(struct drm_i915_private *dev_priv,
skl_enable_dc6(dev_priv);
else if (dev_priv->csr.allowed_dc_mask & DC_STATE_EN_UPTO_DC5)
gen9_enable_dc5(dev_priv);
+ power_well->dc_off.was_disabled = true;
}
static void i9xx_power_well_sync_hw_noop(struct drm_i915_private *dev_priv,
@@ -1441,6 +1451,64 @@ static void chv_pipe_power_well_disable(struct drm_i915_private *dev_priv,
chv_set_pipe_power_well(dev_priv, power_well, false);
}
+bool intel_display_power_vblank_get(struct drm_i915_private *dev_priv)
+{
+ struct i915_power_domains *power_domains = &dev_priv->power_domains;
+ struct i915_power_well *power_well;
+ bool needs_restore = false;
+
+ if (!HAS_CSR(dev_priv) || !dev_priv->psr.source_ok)
+ return false;
+
+ /* The corresponding CRTC should be active by the time driver turns on
+ * vblank interrupts, which in turn means the enabled pipe power domain
+ * would have acquired the device runtime pm reference.
+ */
+ intel_runtime_pm_get_if_in_use(dev_priv);
+
+ for_each_power_domain_well(dev_priv, power_well, BIT_ULL(POWER_DOMAIN_VBLANK)) {
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_lock(&power_well->dc_off.lock);
+
+ intel_power_well_get(dev_priv, power_well);
+
+ if (power_well->id == SKL_DISP_PW_DC_OFF) {
+ needs_restore = power_well->dc_off.was_disabled;
+ power_well->dc_off.was_disabled = false;
+ spin_unlock(&power_well->dc_off.lock);
+ }
+ }
+ atomic_inc(&power_domains->domain_use_count[POWER_DOMAIN_VBLANK]);
+
+ return needs_restore;
+}
+
+void intel_display_power_vblank_put(struct drm_i915_private *dev_priv)
+{
+ struct i915_power_domains *power_domains = &dev_priv->power_domains;
+ struct i915_power_well *power_well;
+
+ if (!HAS_CSR(dev_priv) || !dev_priv->psr.source_ok)
+ return;
+
+ WARN(atomic_dec_return(&power_domains->domain_use_count[POWER_DOMAIN_VBLANK]) < 0,
+ "Use count on domain %s was already zero\n",
+ intel_display_power_domain_str(POWER_DOMAIN_VBLANK));
+
+ for_each_power_domain_well_rev(dev_priv, power_well, BIT_ULL(POWER_DOMAIN_VBLANK)) {
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_lock(&power_well->dc_off.lock);
+
+ intel_power_well_put(dev_priv, power_well);
+
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_unlock(&power_well->dc_off.lock);
+ }
+
+ intel_runtime_pm_put(dev_priv);
+ return;
+}
+
static void
__intel_display_power_get_domain(struct drm_i915_private *dev_priv,
enum intel_display_power_domain domain)
@@ -1448,10 +1516,17 @@ __intel_display_power_get_domain(struct drm_i915_private *dev_priv,
struct i915_power_domains *power_domains = &dev_priv->power_domains;
struct i915_power_well *power_well;
- for_each_power_domain_well(dev_priv, power_well, BIT_ULL(domain))
+ for_each_power_domain_well(dev_priv, power_well, BIT_ULL(domain)) {
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_lock(&power_well->dc_off.lock);
+
intel_power_well_get(dev_priv, power_well);
- power_domains->domain_use_count[domain]++;
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_unlock(&power_well->dc_off.lock);
+ }
+
+ atomic_inc(&power_domains->domain_use_count[domain]);
}
/**
@@ -1537,14 +1612,20 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
mutex_lock(&power_domains->lock);
- WARN(!power_domains->domain_use_count[domain],
- "Use count on domain %s is already zero\n",
+ WARN(atomic_dec_return(&power_domains->domain_use_count[domain]) < 0,
+ "Use count on domain %s was already zero\n",
intel_display_power_domain_str(domain));
- power_domains->domain_use_count[domain]--;
- for_each_power_domain_well_rev(dev_priv, power_well, BIT_ULL(domain))
+ for_each_power_domain_well_rev(dev_priv, power_well, BIT_ULL(domain)) {
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_lock(&power_well->dc_off.lock);
+
intel_power_well_put(dev_priv, power_well);
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_unlock(&power_well->dc_off.lock);
+ }
+
mutex_unlock(&power_domains->lock);
intel_runtime_pm_put(dev_priv);
@@ -1707,6 +1788,7 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
SKL_DISPLAY_POWERWELL_2_POWER_DOMAINS | \
BIT_ULL(POWER_DOMAIN_MODESET) | \
BIT_ULL(POWER_DOMAIN_AUX_A) | \
+ BIT_ULL(POWER_DOMAIN_VBLANK) | \
BIT_ULL(POWER_DOMAIN_INIT))
#define BXT_DISPLAY_POWERWELL_2_POWER_DOMAINS ( \
@@ -2343,6 +2425,9 @@ static struct i915_power_well cnl_power_wells[] = {
.domains = CNL_DISPLAY_DC_OFF_POWER_DOMAINS,
.ops = &gen9_dc_off_power_well_ops,
.id = SKL_DISP_PW_DC_OFF,
+ {
+ .dc_off.was_disabled = false,
+ },
},
{
.name = "power well 2",
@@ -2556,8 +2641,14 @@ static void intel_power_domains_sync_hw(struct drm_i915_private *dev_priv)
mutex_lock(&power_domains->lock);
for_each_power_well(dev_priv, power_well) {
power_well->ops->sync_hw(dev_priv, power_well);
+
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_lock(&power_well->dc_off.lock);
+
power_well->hw_enabled = power_well->ops->is_enabled(dev_priv,
power_well);
+ if (power_well->id == SKL_DISP_PW_DC_OFF)
+ spin_unlock(&power_well->dc_off.lock);
}
mutex_unlock(&power_domains->lock);
}
@@ -3044,7 +3135,7 @@ static void intel_power_domains_dump_info(struct drm_i915_private *dev_priv)
for_each_power_domain(domain, power_well->domains)
DRM_DEBUG_DRIVER(" %-23s %d\n",
intel_display_power_domain_str(domain),
- power_domains->domain_use_count[domain]);
+ atomic_read(&power_domains->domain_use_count[domain]));
}
}
@@ -3080,6 +3171,13 @@ void intel_power_domains_verify_state(struct drm_i915_private *dev_priv)
if (!power_well->domains)
continue;
+ /*
+ * Reading SKL_DISP_PW_DC_OFF power_well->count without its
+ * private spinlock should be safe here as power_well->count
+ * gets modified only in power_well_get() and power_well_put()
+ * and they are not called until drm_crtc_vblank_on().
+ */
+
enabled = power_well->ops->is_enabled(dev_priv, power_well);
if ((power_well->count || power_well->always_on) != enabled)
DRM_ERROR("power well %s state mismatch (refcount %d/enabled %d)",
@@ -3087,7 +3185,7 @@ void intel_power_domains_verify_state(struct drm_i915_private *dev_priv)
domains_count = 0;
for_each_power_domain(domain, power_well->domains)
- domains_count += power_domains->domain_use_count[domain];
+ domains_count += atomic_read(&power_domains->domain_use_count[domain]);
if (power_well->count != domains_count) {
DRM_ERROR("power well %s refcount/domain refcount mismatch "
diff --git a/include/drm/drm_vblank.h b/include/drm/drm_vblank.h
index 848b463a0af5..aafcbef91bd7 100644
--- a/include/drm/drm_vblank.h
+++ b/include/drm/drm_vblank.h
@@ -180,6 +180,7 @@ void drm_crtc_vblank_off(struct drm_crtc *crtc);
void drm_crtc_vblank_reset(struct drm_crtc *crtc);
void drm_crtc_vblank_on(struct drm_crtc *crtc);
u32 drm_crtc_accurate_vblank_count(struct drm_crtc *crtc);
+void drm_crtc_vblank_restore(struct drm_device *dev, unsigned int pipe);
bool drm_calc_vbltimestamp_from_scanoutpos(struct drm_device *dev,
unsigned int pipe, int *max_error,
--
2.11.0
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