✓ Fi.CI.BAT: success for drm/i915: Unify the HSW/BDW and GEN9+ power well code
Patchwork
patchwork at emeril.freedesktop.org
Wed Jul 5 20:17:08 UTC 2017
== Series Details ==
Series: drm/i915: Unify the HSW/BDW and GEN9+ power well code
URL : https://patchwork.freedesktop.org/series/26867/
State : success
== Summary ==
Series 26867v1 drm/i915: Unify the HSW/BDW and GEN9+ power well code
https://patchwork.freedesktop.org/api/1.0/series/26867/revisions/1/mbox/
Test gem_exec_suspend:
Subgroup basic-s4-devices:
dmesg-warn -> PASS (fi-kbl-7560u) fdo#100125 +1
Test kms_busy:
Subgroup basic-flip-default-b:
dmesg-warn -> PASS (fi-skl-6700hq) fdo#101144
Test kms_pipe_crc_basic:
Subgroup hang-read-crc-pipe-a:
dmesg-warn -> PASS (fi-pnv-d510) fdo#101597 +1
fdo#100125 https://bugs.freedesktop.org/show_bug.cgi?id=100125
fdo#101144 https://bugs.freedesktop.org/show_bug.cgi?id=101144
fdo#101597 https://bugs.freedesktop.org/show_bug.cgi?id=101597
fi-bdw-5557u total:279 pass:268 dwarn:0 dfail:0 fail:0 skip:11 time:449s
fi-bdw-gvtdvm total:279 pass:257 dwarn:8 dfail:0 fail:0 skip:14 time:427s
fi-blb-e6850 total:279 pass:224 dwarn:1 dfail:0 fail:0 skip:54 time:357s
fi-bsw-n3050 total:279 pass:243 dwarn:0 dfail:0 fail:0 skip:36 time:528s
fi-bwr-2160 total:279 pass:184 dwarn:0 dfail:0 fail:0 skip:95 time:249s
fi-bxt-j4205 total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:512s
fi-byt-j1900 total:279 pass:254 dwarn:1 dfail:0 fail:0 skip:24 time:491s
fi-byt-n2820 total:279 pass:250 dwarn:1 dfail:0 fail:0 skip:28 time:480s
fi-glk-2a total:279 pass:260 dwarn:0 dfail:0 fail:0 skip:19 time:593s
fi-hsw-4770 total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:436s
fi-hsw-4770r total:279 pass:263 dwarn:0 dfail:0 fail:0 skip:16 time:416s
fi-ilk-650 total:279 pass:229 dwarn:0 dfail:0 fail:0 skip:50 time:422s
fi-ivb-3520m total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:501s
fi-ivb-3770 total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:470s
fi-kbl-7500u total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:460s
fi-kbl-7560u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:570s
fi-kbl-r total:279 pass:261 dwarn:0 dfail:0 fail:0 skip:18 time:578s
fi-pnv-d510 total:279 pass:223 dwarn:1 dfail:0 fail:0 skip:55 time:565s
fi-skl-6260u total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:456s
fi-skl-6700hq total:279 pass:262 dwarn:0 dfail:0 fail:0 skip:17 time:587s
fi-skl-6700k total:279 pass:257 dwarn:4 dfail:0 fail:0 skip:18 time:462s
fi-skl-6770hq total:279 pass:269 dwarn:0 dfail:0 fail:0 skip:10 time:474s
fi-skl-gvtdvm total:279 pass:266 dwarn:0 dfail:0 fail:0 skip:13 time:434s
fi-snb-2520m total:279 pass:251 dwarn:0 dfail:0 fail:0 skip:28 time:541s
fi-snb-2600 total:279 pass:250 dwarn:0 dfail:0 fail:0 skip:29 time:403s
24346e831017070c18f3c33b74a7b098682e20f7 drm-tip: 2017y-07m-04d-15h-39m-34s UTC integration manifest
a8e242f drm/i915: Gather all the power well->domain mappings to one place
f4ecac1 drm/i915/hsw: Move hsw_power_well_enable() next to the rest of HSW helpers
2dbc0da drm/i915/gen9+: Unify the HSW/BDW and GEN9+ power well helpers
897defa drm/i915/hsw: Add has_fuses power well attribute
ab8ca65 drm/i915/hsw, bdw: Wait for the power well disabled state
f62f540 drm/i915/hsw, bdw: Add pipe_mask, has_vga power well attributes
4d8e871 drm/i915/gen9+: Unify the hsw/bdw and gen9+ power well req/state macros
e0e6bee drm/i915/hsw, bdw: Split power well set to enable/disable helpers
01eb2c6 drm/i915/hsw, bdw: Remove redundant state check during power well toggling
9bbf025 drm/i915/gen9+: Remove redundant state check during power well toggling
e856228 drm/i915/gen9+: Remove redundant power well state assert during enabling
3db1f96 drm/i915/bxt, glk: Give a proper name to the power well struct phy field
244ab19 drm/i915: Check for duplicated power well IDs
23b489a drm/i915/hsw, bdw: Add an ID for the global display power well
5df48d1 drm/i915/gen2: Add an ID for the display pipes power well
7ce8a1d drm/i915: Assign everywhere the always-on power well ID
3020033 drm/i915: Unify power well ID enums
737ac24 drm/i915/chv: Add unique power well ID for the pipe A power well
c9f4bea drm/i915/cnl: Fix comment about AUX IO power well enable/disable
9d674f9 drm/i915/gen9+: Don't remove secondary power well requests
2611745 drm/i915/bxt, glk: Fix assert on conditions for DC9 enabling
42fce4e drm/i915/skl: Don't disable misc IO power well during display uninit
44fa947 drm/i915/gen9+: Add 10 us delay after power well 1/AUX IO pw disabling
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Trybot_989/
More information about the Intel-gfx-trybot
mailing list