✓ Fi.CI.BAT: success for series starting with [01/18] drm/i915: Mark CPU cache as dirty on every transition for CPU writes

Patchwork patchwork at emeril.freedesktop.org
Wed May 17 15:42:24 UTC 2017


== Series Details ==

Series: series starting with [01/18] drm/i915: Mark CPU cache as dirty on every transition for CPU writes
URL   : https://patchwork.freedesktop.org/series/24565/
State : success

== Summary ==

Series 24565v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/24565/revisions/1/mbox/

Test gem_exec_flush:
        Subgroup basic-batch-kernel-default-uc:
                pass       -> FAIL       (fi-snb-2600) fdo#100007

fdo#100007 https://bugs.freedesktop.org/show_bug.cgi?id=100007

fi-bdw-5557u     total:278  pass:267  dwarn:0   dfail:0   fail:0   skip:11  time:440s
fi-bsw-n3050     total:278  pass:242  dwarn:0   dfail:0   fail:0   skip:36  time:570s
fi-bxt-j4205     total:278  pass:259  dwarn:0   dfail:0   fail:0   skip:19  time:512s
fi-byt-j1900     total:278  pass:254  dwarn:0   dfail:0   fail:0   skip:24  time:495s
fi-byt-n2820     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:490s
fi-hsw-4770      total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:420s
fi-hsw-4770r     total:278  pass:262  dwarn:0   dfail:0   fail:0   skip:16  time:409s
fi-ilk-650       total:278  pass:228  dwarn:0   dfail:0   fail:0   skip:50  time:420s
fi-ivb-3520m     total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:479s
fi-ivb-3770      total:278  pass:260  dwarn:0   dfail:0   fail:0   skip:18  time:466s
fi-kbl-7500u     total:278  pass:255  dwarn:5   dfail:0   fail:0   skip:18  time:463s
fi-skl-6260u     total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:465s
fi-skl-6700hq    total:278  pass:261  dwarn:0   dfail:0   fail:0   skip:17  time:569s
fi-skl-6700k     total:278  pass:256  dwarn:4   dfail:0   fail:0   skip:18  time:470s
fi-skl-6770hq    total:278  pass:268  dwarn:0   dfail:0   fail:0   skip:10  time:500s
fi-snb-2520m     total:278  pass:250  dwarn:0   dfail:0   fail:0   skip:28  time:540s
fi-snb-2600      total:278  pass:248  dwarn:0   dfail:0   fail:1   skip:29  time:404s

eb3549d312620118dec3a69200894ac8a8fff358 drm-tip: 2017y-05m-17d-13h-53m-40s UTC integration manifest
1520494 drm/i915/scheduler: Support user-defined priorities
6fc82f4 drm/i915: Convert execbuf to use struct-of-array packing for critical fields
6ed4666 drm/i915: Stash a pointer to the obj's resv in the vma
12464ab drm/i915: Async GPU relocation processing
61fcb8af drm/i915: Allow execbuffer to use the first object as the batch
f0480b6 drm/i915: Wait upon userptr get-user-pages within execbuffer
1ef873a drm/i915: First try the previous execbuffer location
1bfef32 drm/i915: Store a persistent reference for an object in the execbuffer cache
23faa4c drm/i915: Eliminate lots of iterations over the execobjects array
2813406 drm/i915: Disable EXEC_OBJECT_ASYNC when doing relocations
0289e1f drm/i915: Pass vma to relocate entry
5a2e1fb drm/i915: Store a direct lookup from object handle to vma
dddaaff drm/i915: Split vma exec_link/evict_link
1bb9624 drm/i915: Use vma->exec_entry as our double-entry placeholder
03e27e0 drm/i915: Amalgamate execbuffer parameter structures
cbd63bd drm/i915: Reinstate reservation_object zapping for batch_pool objects
cec112b drm/i915: Store i915_gem_object_is_coherent() as a bit next to cache-dirty
3c9db38 drm/i915: Mark CPU cache as dirty on every transition for CPU writes

== Logs ==

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