✓ Fi.CI.BAT: success for series starting with [01/22] drm/i915: Mark CPU cache as dirty on every transition for CPU writes
Patchwork
patchwork at emeril.freedesktop.org
Fri May 19 11:20:12 UTC 2017
== Series Details ==
Series: series starting with [01/22] drm/i915: Mark CPU cache as dirty on every transition for CPU writes
URL : https://patchwork.freedesktop.org/series/24685/
State : success
== Summary ==
Series 24685v1 Series without cover letter
https://patchwork.freedesktop.org/api/1.0/series/24685/revisions/1/mbox/
Test gem_busy:
Subgroup basic-hang-default:
incomplete -> PASS (fi-blb-e6850) fdo#100998
Test gem_tiled_fence_blits:
Subgroup basic:
notrun -> INCOMPLETE (fi-blb-e6850) fdo#99093
Test kms_cursor_legacy:
Subgroup basic-busy-flip-before-cursor-atomic:
fail -> PASS (fi-snb-2600) fdo#100215 +1
fdo#100998 https://bugs.freedesktop.org/show_bug.cgi?id=100998
fdo#99093 https://bugs.freedesktop.org/show_bug.cgi?id=99093
fdo#100215 https://bugs.freedesktop.org/show_bug.cgi?id=100215
fi-bdw-5557u total:278 pass:267 dwarn:0 dfail:0 fail:0 skip:11 time:438s
fi-bdw-gvtdvm total:278 pass:256 dwarn:8 dfail:0 fail:0 skip:14 time:430s
fi-blb-e6850 total:278 pass:119 dwarn:0 dfail:0 fail:0 skip:32
fi-bsw-n3050 total:278 pass:242 dwarn:0 dfail:0 fail:0 skip:36 time:575s
fi-bwr-2160 total:278 pass:183 dwarn:0 dfail:0 fail:0 skip:95 time:251s
fi-bxt-j4205 total:278 pass:259 dwarn:0 dfail:0 fail:0 skip:19 time:511s
fi-byt-j1900 total:278 pass:254 dwarn:0 dfail:0 fail:0 skip:24 time:489s
fi-byt-n2820 total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:478s
fi-hsw-4770 total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:414s
fi-hsw-4770r total:278 pass:262 dwarn:0 dfail:0 fail:0 skip:16 time:407s
fi-ilk-650 total:278 pass:228 dwarn:0 dfail:0 fail:0 skip:50 time:421s
fi-ivb-3520m total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:479s
fi-ivb-3770 total:278 pass:260 dwarn:0 dfail:0 fail:0 skip:18 time:471s
fi-kbl-7500u total:278 pass:255 dwarn:5 dfail:0 fail:0 skip:18 time:460s
fi-pnv-d510 total:146 pass:112 dwarn:0 dfail:0 fail:0 skip:33
fi-skl-6260u total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:453s
fi-skl-6700hq total:278 pass:261 dwarn:0 dfail:0 fail:0 skip:17 time:565s
fi-skl-6700k total:278 pass:256 dwarn:4 dfail:0 fail:0 skip:18 time:466s
fi-skl-6770hq total:278 pass:268 dwarn:0 dfail:0 fail:0 skip:10 time:498s
fi-skl-gvtdvm total:278 pass:265 dwarn:0 dfail:0 fail:0 skip:13 time:431s
fi-snb-2520m total:278 pass:250 dwarn:0 dfail:0 fail:0 skip:28 time:535s
fi-snb-2600 total:278 pass:248 dwarn:0 dfail:0 fail:1 skip:29 time:407s
4b413dce87b523e2118005c265cc6cac48ae9162 drm-tip: 2017y-05m-19d-10h-27m-41s UTC integration manifest
52aa6bc RFC drm/i915: Expose a PMU interface for perf queries
fc928b9 drm/i915: Keep a recent cache of freed contexts objects for reuse
35ed3ed drm/i915: Enable rcu-only context lookups
8a31b5b drm/i915: Allow contexts to be unreferenced locklessly
4eaca98 drm/i915: Group all the global context information together
cb131bb drm/i915/scheduler: Support user-defined priorities
da99cb0 drm/i915: Convert execbuf to use struct-of-array packing for critical fields
792da24 drm/i915: Stash a pointer to the obj's resv in the vma
5c60645 drm/i915: Async GPU relocation processing
559831f drm/i915: Allow execbuffer to use the first object as the batch
3b022b8 drm/i915: Wait upon userptr get-user-pages within execbuffer
8e6ac8e drm/i915: First try the previous execbuffer location
4ec615d drm/i915: Store a persistent reference for an object in the execbuffer cache
e5e903e drm/i915: Eliminate lots of iterations over the execobjects array
78ae9a7 drm/i915: Disable EXEC_OBJECT_ASYNC when doing relocations
2e6b038 drm/i915: Pass vma to relocate entry
f5e7b9d drm/i915: Store a direct lookup from object handle to vma
668037d drm/i915: Split vma exec_link/evict_link
d8fd09a drm/i915: Use vma->exec_entry as our double-entry placeholder
a7e7e27 drm/i915: Amalgamate execbuffer parameter structures
c5e56a8 drm/i915: Reinstate reservation_object zapping for batch_pool objects
d1cb8dd drm/i915: Mark CPU cache as dirty on every transition for CPU writes
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Trybot_828/
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