[PATCH 04/17] drm/i915: align 64K objects to 2M

[Matthew Auld]

We can't mix 64K and 4K pte's in the same page-table, so for now we
align 64K objects to 2M to avoid any potential mixing. This is
potentially wasteful but in reality shouldn't be too bad since this only
applies to the virtual address space of a 48b PPGTT.

Suggested-by: Chris Wilson <chris at chris-wilson.co.uk>
Signed-off-by: Matthew Auld <matthew.auld at intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_vma.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 6f75ec595158..3be37f10affb 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -493,6 +493,15 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
 			if (!is_power_of_2(page_alignment))
 				page_alignment = BIT(fls64(page_alignment)-1);
 
+			/* We can't mix 64K and 4K pte's in the same page-table (2M
+			 * block), and so to avoid the ugliness and complexity of
+			 * coloring we opt for just aligning 64K objects to 2M.
+			 */
+			if (page_alignment == I915_GTT_PAGE_SIZE_64K) {
+				page_alignment = I915_GTT_PAGE_SIZE_2M;
+				size = roundup(size, page_alignment);
+			}
+
 			alignment = max_t(typeof(alignment), alignment,
 					  page_alignment);
 		}
-- 
2.9.4