[PATCH 05/15] drm/i915: align the vma start to the largest gtt page size

Matthew Auld matthew.auld at intel.com
Tue May 30 16:28:37 UTC 2017


When inserting into a 48bit PPGTT we need to align the vma start address
to the required page size boundary. The size will already be aligned so
no padding is needed.

Signed-off-by: Matthew Auld <matthew.auld at intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/i915_vma.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_vma.c b/drivers/gpu/drm/i915/i915_vma.c
index 1aba47024656..eb2d1e59b88a 100644
--- a/drivers/gpu/drm/i915/i915_vma.c
+++ b/drivers/gpu/drm/i915/i915_vma.c
@@ -485,6 +485,15 @@ i915_vma_insert(struct i915_vma *vma, u64 size, u64 alignment, u64 flags)
 		if (ret)
 			goto err_unpin;
 	} else {
+		if (i915_vm_is_48bit(vma->vm) &&
+		    obj->mm.gtt_page_sizes > I915_GTT_PAGE_SIZE) {
+			unsigned int page_alignment =
+				BIT(fls64(obj->mm.gtt_page_sizes)-1);
+
+			alignment = max_t(typeof(alignment), alignment,
+					  page_alignment);
+		}
+
 		ret = i915_gem_gtt_insert(vma->vm, &vma->node,
 					  size, alignment, obj->cache_level,
 					  start, end, flags);
-- 
2.9.4



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