[PATCH 14/22] drm/i915/uc: Create uC runtime and system suspend/resume helpers
Sagar Arun Kamble
sagar.a.kamble at intel.com
Thu Oct 5 11:22:07 UTC 2017
Prepared generic helpers intel_uc_suspend, intel_uc_resume,
intel_uc_runtime_suspend, intel_uc_runtime_resume. These are
called from respective GEM functions.
Only exception is intel_uc_resume that needs to be called
w/ or w/o GuC loaded in i915_drm_resume path. Changes to
add WOPCM condition check to load GuC during resume will be added
in later patches.
v2: Rebase w.r.t removal of GuC code restructuring.
v3: Calling intel_uc_resume from i915_gem_resume post resuming
i915 gem setup. This is symmetrical with i915_gem_suspend.
Removed error messages from i915 suspend/resume routines as
uC suspend/resume routines will have those. (Michal Wajdeczko)
Declare wedged on uc_suspend failure and uc_resume failure.
(Michał Winiarski)
Keeping the uC suspend/resume function definitions close to other
uC functions.
v4: Added implementation to intel_uc_resume as GuC resume is
needed to be triggered post reloading the firmware as well. Added
comments about semantics of GuC resume with the firmware reload.
v5: Updated return from i915_gem_runtime_suspend. Moved the comment
about GuC reload optimization to intel_uc_init_hw. (Michal Wajdeczko)
Updated comments as FIXME.
v6: Kept error handling for failure from i915_gem_runtime_suspend only.
We don't want GEM/GuC resume failure to impact intel_runtime_resume or
i915_drm_resume. GEM suspend failure along i915_drm_suspend can also
be ignored as we reset GPU post that. Updated comments. (Chris, Joonas)
Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
Cc: Michał Winiarski <michal.winiarski at intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 10 ++++++++++
drivers/gpu/drm/i915/i915_gem.c | 19 ++++++++++++++-----
drivers/gpu/drm/i915/intel_uc.c | 33 +++++++++++++++++++++++++++++++++
drivers/gpu/drm/i915/intel_uc.h | 4 ++++
4 files changed, 61 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index df9a561..eb87040 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1710,6 +1710,16 @@ static int i915_drm_resume(struct drm_device *dev)
}
mutex_unlock(&dev->struct_mutex);
+ /*
+ * TODO: On early resume we have done full GPU reset. GuC has to be
+ * loaded during i915_gem_init_hw. Now, send action to GuC to resume
+ * back as earlier call to intel_uc_resume from i915_gem_resume would
+ * have done nothing. This needs to be skipped if GuC is not loaded
+ * during resume as intel_uc_resume would have been already called
+ * from i915_gem_resume.
+ */
+ intel_uc_resume(dev_priv);
+
intel_modeset_init_hw(dev);
spin_lock_irq(&dev_priv->irq_lock);
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 15c1510..3467248 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2025,9 +2025,11 @@ int i915_gem_fault(struct vm_fault *vmf)
int i915_gem_runtime_suspend(struct drm_i915_private *dev_priv)
{
struct drm_i915_gem_object *obj, *on;
- int i;
+ int i, ret;
- intel_guc_suspend(dev_priv);
+ ret = intel_uc_runtime_suspend(dev_priv);
+ if (ret)
+ return ret;
/*
* Only called during RPM suspend. All users of the userfault_list
@@ -2076,7 +2078,7 @@ void i915_gem_runtime_resume(struct drm_i915_private *dev_priv)
i915_gem_init_swizzling(dev_priv);
i915_gem_restore_fences(dev_priv);
- intel_guc_resume(dev_priv);
+ intel_uc_runtime_resume(dev_priv);
}
static int i915_gem_object_create_mmap_offset(struct drm_i915_gem_object *obj)
@@ -4567,7 +4569,7 @@ int i915_gem_suspend(struct drm_i915_private *dev_priv)
if (WARN_ON(!intel_engines_are_idle(dev_priv)))
i915_gem_set_wedged(dev_priv); /* no hope, discard everything */
- intel_guc_suspend(dev_priv);
+ intel_uc_suspend(dev_priv);
/*
* Neither the BIOS, ourselves or any other kernel
@@ -4615,7 +4617,14 @@ void i915_gem_resume(struct drm_i915_private *dev_priv)
*/
dev_priv->gt.resume(dev_priv);
- intel_guc_resume(dev_priv);
+ /*
+ * TODO: On early resume, Full GPU reset is done which unloads the
+ * GuC firmware. If reset is avoided there, we can check the WOPCM
+ * status here to see if GuC is still loaded and just do GuC resume
+ * without reloading the firmware back.
+ */
+ intel_uc_resume(dev_priv);
+
mutex_unlock(&dev->struct_mutex);
}
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 0cc4362..a99ec3b 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -176,6 +176,13 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
goto err_guc;
}
+ /*
+ * TODO: Currently, GuC is loaded unconditionally without checking
+ * if it is already available in WOPCM (generally available after resume
+ * from sleep state). We can skip the load based on WOPCM status (To be
+ * decided based on bit 0 of GUC_WOPCM_SIZE).
+ */
+
/* init WOPCM */
I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv));
I915_WRITE(DMA_GUC_WOPCM_OFFSET,
@@ -289,3 +296,29 @@ void intel_uc_sanitize(struct drm_i915_private *dev_priv,
{
intel_guc_sanitize(dev_priv, engine_mask);
}
+
+int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv)
+{
+ int ret;
+
+ ret = intel_guc_suspend(dev_priv);
+ if (ret)
+ DRM_ERROR("Failed to suspend GuC\n");
+
+ return ret;
+}
+
+void intel_uc_runtime_resume(struct drm_i915_private *dev_priv)
+{
+ intel_guc_resume(dev_priv);
+}
+
+void intel_uc_suspend(struct drm_i915_private *dev_priv)
+{
+ intel_guc_suspend(dev_priv);
+}
+
+void intel_uc_resume(struct drm_i915_private *dev_priv)
+{
+ intel_guc_resume(dev_priv);
+}
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index 149cf03..8352dc0 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -36,5 +36,9 @@
void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
void intel_uc_sanitize(struct drm_i915_private *dev_priv,
unsigned int engine_mask);
+int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv);
+void intel_uc_runtime_resume(struct drm_i915_private *dev_priv);
+void intel_uc_suspend(struct drm_i915_private *dev_priv);
+void intel_uc_resume(struct drm_i915_private *dev_priv);
#endif
--
1.9.1
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