[PATCH 11/20] drm/i915/uc: Create uC suspend and resume functions

Sagar Arun Kamble sagar.a.kamble at intel.com
Wed Oct 11 17:32:34 UTC 2017

Prepared generic helpers intel_uc_suspend, intel_uc_resume
, intel_uc_runtime_suspend and intel_uc_runtime_resume. These are
called from respective GEM functions. Only exception is intel_guc_resume
that needs to be called with GuC reloaded in resume path through
intel_uc_init_hw as done in later patches. Changes to add WOPCM condition
check to load GuC during resume will be added in later patches.

v2: Rebase w.r.t removal of GuC code restructuring.

v3: Calling intel_uc_resume from i915_gem_resume post resuming
i915 gem setup. This is symmetrical with i915_gem_suspend.
Removed error messages from i915 suspend/resume routines as
uC suspend/resume routines will have those. (Michal Wajdeczko)
Declare wedged on uc_suspend failure and uc_resume failure.
(Michał Winiarski)
Keeping the uC suspend/resume function definitions close to other
uC functions.

v4: Added implementation to intel_uc_resume as GuC resume is
needed to be triggered post reloading the firmware as well. Added
comments about semantics of GuC resume with the firmware reload.

v5: Updated return from i915_gem_runtime_suspend. Moved the comment
about GuC reload optimization to intel_uc_init_hw. (Michal Wajdeczko)
Updated comments as FIXME.

v6: Kept error handling for failure from i915_gem_runtime_suspend only.
We don't want GEM/GuC resume failure to impact intel_runtime_resume or
i915_drm_resume. GEM suspend failure along i915_drm_suspend can also
be ignored as we reset GPU post that. Updated comments. (Chris, Joonas)

v7: Removed intel_uc_resume from i915_drm_resume as it will be done as
part of intel_uc_init_hw in further patches. Removed TODO comments about
handling GuC load skip on resume. This is to be addressed in further
patches. Added error return from intel_uc_suspend as we plan to add
functionality to resume submission in case of suspend failure in further
patches. Removed runtime uC suspend/resume functions as functionality
will be similar in both paths.

v8: Added uC runtime suspend/resume as runtime and drm suspend/resume
flows will differ. Enabling and disabling of GuC submission needs RPM
reference and controlling from RPM suspend/resume leads to recursion.
So currently uC runtime suspend/resume will not control GuC submission
disable/enable as done in later patches.

v9: Rebase due to change in the patch order.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
Cc: Michał Winiarski <michal.winiarski at intel.com>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
 drivers/gpu/drm/i915/i915_gem.c | 17 +++++++++++------
 drivers/gpu/drm/i915/intel_uc.c | 32 ++++++++++++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_uc.h |  4 ++++
 3 files changed, 47 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 2700d9c..4301d50 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2056,9 +2056,11 @@ static void __i915_gem_object_release_mmap(struct drm_i915_gem_object *obj)
 int i915_gem_runtime_suspend(struct drm_i915_private *dev_priv)
 	struct drm_i915_gem_object *obj, *on;
-	int i;
+	int i, ret;
-	intel_guc_suspend(&dev_priv->guc);
+	ret = intel_uc_runtime_suspend(dev_priv);
+	if (ret)
+		goto out;
 	 * Only called during RPM suspend. All users of the userfault_list
@@ -2096,7 +2098,8 @@ int i915_gem_runtime_suspend(struct drm_i915_private *dev_priv)
 		reg->dirty = true;
-	return 0;
+	return ret;
 void i915_gem_runtime_resume(struct drm_i915_private *dev_priv)
@@ -2104,7 +2107,7 @@ void i915_gem_runtime_resume(struct drm_i915_private *dev_priv)
-	intel_guc_resume(&dev_priv->guc);
+	intel_uc_runtime_resume(dev_priv);
 static int i915_gem_object_create_mmap_offset(struct drm_i915_gem_object *obj)
@@ -4672,7 +4675,9 @@ int i915_gem_quiesce(struct drm_i915_private *dev_priv)
 		i915_gem_set_wedged(dev_priv); /* no hope, discard everything */
-	intel_guc_suspend(&dev_priv->guc);
+	ret = intel_uc_suspend(dev_priv);
+	if (ret)
+		goto err_unlock;
@@ -4737,7 +4742,7 @@ void i915_gem_resume(struct drm_i915_private *dev_priv)
-	intel_guc_resume(&dev_priv->guc);
+	intel_uc_resume(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 7305486..fe62aa7 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -283,3 +283,35 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
 	if (i915_modparams.enable_guc_loading)
+int intel_uc_suspend(struct drm_i915_private *dev_priv)
+	int ret;
+	ret = intel_guc_suspend(&dev_priv->guc);
+	if (ret)
+		DRM_ERROR("Failed to suspend GuC\n");
+	return ret;
+void intel_uc_resume(struct drm_i915_private *dev_priv)
+	intel_guc_resume(&dev_priv->guc);
+int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv)
+	int ret;
+	ret = intel_guc_suspend(&dev_priv->guc);
+	if (ret)
+		DRM_ERROR("Failed to suspend GuC\n");
+	return ret;
+void intel_uc_runtime_resume(struct drm_i915_private *dev_priv)
+	intel_guc_resume(&dev_priv->guc);
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index e18d3bb..adec2c7 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -34,5 +34,9 @@
 void intel_uc_fini_fw(struct drm_i915_private *dev_priv);
 int intel_uc_init_hw(struct drm_i915_private *dev_priv);
 void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
+int intel_uc_suspend(struct drm_i915_private *dev_priv);
+void intel_uc_resume(struct drm_i915_private *dev_priv);
+int intel_uc_runtime_suspend(struct drm_i915_private *dev_priv);
+void intel_uc_runtime_resume(struct drm_i915_private *dev_priv);

More information about the Intel-gfx-trybot mailing list