[PATCH 16/22] drm/i915/uc: Introduce intel_uc_reset_state to initialize GuC/HuC reset state

Sagar Arun Kamble sagar.a.kamble at intel.com
Tue Oct 17 08:03:39 UTC 2017


In i915_reset, GPU will be reset and driver state about GuC/HuC load
status will be invalid. Hence, we mark both GuC/HuC as not loaded/NONE.

v2: Rebase. This patch is moved earlier in the series to facilitate
handling suspend/resume changes for GuC in details.

v3: Defined intel_guc and intel_huc pointers in uc_sanitize.
(Michal Wajdeczko)

v4: s/intel_uc_sanitize/intel_uc_reset_state. Calling only post reset.
Planning to use this during resume from sleep if i915 was reset during
suspend cycle.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
Cc: MichaƂ Winiarski <michal.winiarski at intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
---
 drivers/gpu/drm/i915/i915_drv.c |  2 ++
 drivers/gpu/drm/i915/intel_uc.c | 22 ++++++++++++++++++++++
 drivers/gpu/drm/i915/intel_uc.h |  1 +
 3 files changed, 25 insertions(+)

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 601df13..9e2bc0c 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -1903,6 +1903,8 @@ void i915_reset(struct drm_i915_private *i915, unsigned int flags)
 		goto error;
 	}
 
+	intel_uc_reset_state(i915);
+
 	i915_gem_reset(i915);
 	intel_overlay_reset(i915);
 
diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index 5ecb94e..e668b3a 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -292,3 +292,25 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
 
 	i915_ggtt_disable_guc(dev_priv);
 }
+
+/**
+ * intel_uc_reset_state() - Sanitize uC state post RESET.
+ * @dev_priv: i915 device private
+ *
+ * This function marks load_status as FIRMWARE_NONE and sanitizes state of
+ * other GuC tasks. This is intended to be called after RESET.
+ */
+void intel_uc_reset_state(struct drm_i915_private *dev_priv)
+{
+	struct intel_guc *guc = &dev_priv->guc;
+	struct intel_huc *huc = &dev_priv->huc;
+
+	if (i915_modparams.enable_guc_loading) {
+		spin_lock_irq(&dev_priv->irq_lock);
+		guc->interrupt_clients = 0;
+		spin_unlock_irq(&dev_priv->irq_lock);
+
+		guc->fw.load_status = INTEL_UC_FIRMWARE_NONE;
+		huc->fw.load_status = INTEL_UC_FIRMWARE_NONE;
+	}
+}
diff --git a/drivers/gpu/drm/i915/intel_uc.h b/drivers/gpu/drm/i915/intel_uc.h
index e18d3bb..e47b989 100644
--- a/drivers/gpu/drm/i915/intel_uc.h
+++ b/drivers/gpu/drm/i915/intel_uc.h
@@ -34,5 +34,6 @@
 void intel_uc_fini_fw(struct drm_i915_private *dev_priv);
 int intel_uc_init_hw(struct drm_i915_private *dev_priv);
 void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
+void intel_uc_reset_state(struct drm_i915_private *dev_priv);
 
 #endif
-- 
1.9.1



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