[PATCH 18/22] drm/i915/guc: Introduce guc_mia_in_reset function

[Sagar Arun Kamble]

Minute IA reset check is needed during uc_reset_hw. It will also
be needed while checking GuC load status during resume from sleep.
Prepare function guc_mia_in_reset to reuse this functionality.

Signed-off-by: Sagar Arun Kamble <sagar.a.kamble at intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko at intel.com>
Cc: Michał Winiarski <michal.winiarski at intel.com>
Cc: Chris Wilson <chris at chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen at linux.intel.com>
---
 drivers/gpu/drm/i915/intel_uc.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_uc.c b/drivers/gpu/drm/i915/intel_uc.c
index a220a9e..b80ccf1 100644
--- a/drivers/gpu/drm/i915/intel_uc.c
+++ b/drivers/gpu/drm/i915/intel_uc.c
@@ -26,12 +26,18 @@
 #include "i915_drv.h"
 #include "i915_guc_submission.h"
 
+static inline bool guc_mia_in_reset(struct intel_guc *guc)
+{
+	struct drm_i915_private *dev_priv = guc_to_i915(guc);
+
+	return !!(I915_READ(GUC_STATUS) & GS_MIA_IN_RESET);
+}
+
 /* Reset GuC providing us with fresh state for both GuC and HuC.
  */
 static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv)
 {
 	int ret;
-	u32 guc_status;
 
 	ret = intel_guc_reset(dev_priv);
 	if (ret) {
@@ -39,10 +45,9 @@ static int __intel_uc_reset_hw(struct drm_i915_private *dev_priv)
 		return ret;
 	}
 
-	guc_status = I915_READ(GUC_STATUS);
-	WARN(!(guc_status & GS_MIA_IN_RESET),
+	WARN(!guc_mia_in_reset(&dev_priv->guc),
 	     "GuC status: 0x%x, MIA core expected to be in reset\n",
-	     guc_status);
+	     I915_READ(GUC_STATUS));
 
 	return ret;
 }
-- 
1.9.1