[PATCH] ALSA: hda: do one more reset before parsing bus caps

[Vinod Koul]

We should try to do reset twice to ensure the controller is out of reset
completely, try this to see if the issue is fixed with this

Signed-off-by: Vinod Koul <vinod.koul at intel.com>
---
 sound/pci/hda/hda_intel.c | 26 +++++++++++++++++++++++++-
 1 file changed, 25 insertions(+), 1 deletion(-)

diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 3ad3c8c04a49..996eb1f54488 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -645,7 +645,7 @@ static void hda_intel_init_chip(struct azx *chip, bool full_reset)
 		val = val & ~INTEL_HDA_CGCTL_MISCBDCGE;
 		pci_write_config_dword(pci, INTEL_HDA_CGCTL, val);
 	}
-	pr_err("HDA: we are doing full chip reset now\n");
+	pr_err("HDA: we are doing full chip reset now: %d\n", full_reset);
 	azx_init_chip(chip, full_reset);
 	if (chip->driver_type == AZX_DRIVER_SKL) {
 		pci_read_config_dword(pci, INTEL_HDA_CGCTL, &val);
@@ -1920,6 +1920,30 @@ static int azx_first_init(struct azx *chip)
 
 	hda_intel_init_chip(chip, (probe_only[dev] & 2) == 0);
 
+	pr_err("HDA: reset status %x\n", snd_hdac_chip_readw(bus, GCTL));
+
+	/*
+	 * do the reset again
+	 */
+	/* clear STATESTS */
+	snd_hdac_chip_writew(bus, STATESTS, STATESTS_INT_MASK);
+
+	/* reset controller */
+	snd_hdac_bus_enter_link_reset(bus);
+
+	/* delay for >= 100us for codec PLL to settle per spec
+	 * Rev 0.9 section 5.5.1
+	 */
+	usleep_range(500, 1000);
+
+	/* Bring controller out of reset */
+	snd_hdac_bus_exit_link_reset(bus);
+
+	/* Brent Chartrand said to wait >= 540us for codecs to initialize */
+	usleep_range(1000, 1200);
+
+	pr_err("HDA: reset status %x\n", snd_hdac_chip_readw(bus, GCTL));
+
 	if (chip->driver_type == AZX_DRIVER_SKL)
 		snd_hdac_bus_parse_capabilities(bus);
 
-- 
2.7.4