[PATCH 11/98] drm/i915/execlists: Assert we keep the HW context pinned

[Chris Wilson]

Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/intel_lrc.c | 19 +++++++++++++++----
 1 file changed, 15 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 763b7fa07a64..33233b969754 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -463,6 +463,7 @@ static void execlists_submit_ports(struct intel_engine_cs *engine)
 
 		rq = port_unpack(&port[n], &count);
 		if (rq) {
+			GEM_BUG_ON(!rq->hw_context->pin_count);
 			GEM_BUG_ON(count > !n);
 			if (!count++)
 				execlists_context_schedule_in(rq);
@@ -1097,7 +1098,6 @@ static void execlists_submission_tasklet(unsigned long data)
 					   !(status & GEN8_CTX_STATUS_ELEMENT_SWITCH));
 				GEM_BUG_ON(!port_isset(&port[1]) &&
 					   !(status & GEN8_CTX_STATUS_ACTIVE_IDLE));
-
 				/*
 				 * We rely on the hardware being strongly
 				 * ordered, that the breadcrumb write is
@@ -1108,16 +1108,27 @@ static void execlists_submission_tasklet(unsigned long data)
 
 				execlists_context_schedule_out(rq);
 				trace_i915_request_out(rq);
-				i915_request_put(rq);
 
 				GEM_TRACE("%s completed ctx=%d\n",
 					  engine->name, port->context_id);
 
 				port = execlists_port_complete(execlists, port);
-				if (port_isset(port))
+				if (port_isset(port)) {
 					execlists_user_begin(execlists, port);
-				else
+				} else {
+					/*
+					 * This context must not be unpinned
+					 * until *after* we have completed the
+					 * following context switch. Until then
+					 * the HW may have deferred its writes,
+					 * and we keep the context pinned via
+					 * engine->last_retired_context.
+					 */
+					GEM_BUG_ON(!rq->hw_context->pin_count);
 					execlists_user_end(execlists);
+				}
+
+				i915_request_put(rq);
 			} else {
 				port_set(port, port_pack(rq, count));
 			}
-- 
2.17.0