[PATCH 78/98] no-write-flush

Chris Wilson chris at chris-wilson.co.uk
Fri Apr 27 11:11:01 UTC 2018


---
 drivers/gpu/drm/i915/intel_ringbuffer.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.c b/drivers/gpu/drm/i915/intel_ringbuffer.c
index f7e0d0076acd..d2c0664dc305 100644
--- a/drivers/gpu/drm/i915/intel_ringbuffer.c
+++ b/drivers/gpu/drm/i915/intel_ringbuffer.c
@@ -76,6 +76,8 @@ gen2_render_ring_flush(struct i915_request *rq, u32 mode)
 
 	if (mode & EMIT_INVALIDATE)
 		cmd |= MI_READ_FLUSH;
+	if (!(mode & EMIT_FLUSH))
+		cmd |= MI_NO_WRITE_FLUSH;
 
 	cs = intel_ring_begin(rq, 2);
 	if (IS_ERR(cs))
@@ -127,6 +129,8 @@ gen4_render_ring_flush(struct i915_request *rq, u32 mode)
 		if (IS_G4X(rq->i915) || IS_GEN5(rq->i915))
 			cmd |= MI_INVALIDATE_ISP;
 	}
+	if (!(mode & EMIT_FLUSH))
+		cmd |= MI_NO_WRITE_FLUSH;
 
 	cs = intel_ring_begin(rq, 2);
 	if (IS_ERR(cs))
-- 
2.17.0



More information about the Intel-gfx-trybot mailing list