[PATCH 76/77] set-engines
Chris Wilson
chris at chris-wilson.co.uk
Sat Apr 28 14:04:40 UTC 2018
---
drivers/gpu/drm/i915/i915_gem_context.c | 103 +++++++++++++++++++++
drivers/gpu/drm/i915/i915_gem_context.h | 4 +
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 22 +++--
include/uapi/drm/i915_drm.h | 31 +++++++
4 files changed, 154 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem_context.c b/drivers/gpu/drm/i915/i915_gem_context.c
index ebfc7d1dfede..5efbc45fb22d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.c
+++ b/drivers/gpu/drm/i915/i915_gem_context.c
@@ -135,6 +135,8 @@ static void i915_gem_context_free(struct i915_gem_context *ctx)
ce->ops->destroy(ce);
}
+ kfree(ctx->engines);
+
if (ctx->timeline)
i915_timeline_put(ctx->timeline);
@@ -837,6 +839,103 @@ int i915_gem_context_getparam_ioctl(struct drm_device *dev, void *data,
return ret;
}
+static int set_engines__extensions(struct i915_gem_context *ctx,
+ struct intel_engine_cs **engines,
+ unsigned int nengine,
+ struct i915_user_extension __user *ext)
+{
+ int err;
+ u64 x;
+
+ if (!ext)
+ return 0;
+
+ if (get_user(x, &ext->name))
+ return -EFAULT;
+
+ err = -EINVAL;
+ switch (x) {
+ default:
+ break;
+ }
+ if (err)
+ return err;
+
+ if (get_user(x, &ext->next_extension))
+ return -EFAULT;
+
+ return set_engines__extensions(ctx,
+ engines, nengine,
+ u64_to_user_ptr(x));
+}
+
+static int set_engines(struct i915_gem_context *ctx,
+ struct drm_i915_gem_context_param *args)
+{
+ struct i915_context_param_engines __user *user;
+ struct intel_engine_cs **engines;
+ unsigned int nengine, n;
+ u64 size, extensions;
+ int err;
+
+ user = u64_to_user_ptr(args->value);
+ size = args->size;
+ if (!size) {
+ engines = NULL;
+ nengine = -1;
+ goto out;
+ }
+
+ if (size < sizeof(struct i915_context_param_engines))
+ return -EINVAL;
+
+ size -= sizeof(struct i915_context_param_engines);
+ if (size % sizeof(*user->class_instance))
+ return -EINVAL;
+
+ nengine = size / sizeof(*user->class_instance);
+ if (nengine == 0 || nengine >= I915_EXEC_RING_MASK)
+ return -EINVAL;
+
+ engines = kmalloc_array(nengine + 1, sizeof(*engines), GFP_KERNEL);
+ if (!engines)
+ return -ENOMEM;
+
+ engines[0] = NULL;
+ for (n = 0; n < nengine; n++) {
+ u32 class, instance;
+
+ if (get_user(class, &user->class_instance[n].class) ||
+ get_user(instance, &user->class_instance[n].instance)) {
+ kfree(engines);
+ return -EFAULT;
+ }
+
+ engines[n + 1] =
+ intel_engine_lookup_user(ctx->i915, class, instance);
+ if (!engines[n + 1]) {
+ kfree(engines);
+ return -ENOENT;
+ }
+ }
+
+ err = -EFAULT;
+ if (!get_user(extensions, &user->extensions))
+ err = set_engines__extensions(ctx, engines, nengine,
+ u64_to_user_ptr(extensions));
+ if (err) {
+ kfree(engines);
+ return err;
+ }
+
+out:
+ kfree(ctx->engines);
+ ctx->engines = engines;
+ ctx->nengine = nengine + 1;
+
+ return 0;
+}
+
int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
struct drm_file *file)
{
@@ -953,6 +1052,10 @@ int i915_gem_context_setparam_ioctl(struct drm_device *dev, void *data,
ctx->preempt_timeout = args->value;
break;
+ case I915_CONTEXT_PARAM_ENGINES:
+ ret = set_engines(ctx, args);
+ break;
+
default:
ret = -EINVAL;
break;
diff --git a/drivers/gpu/drm/i915/i915_gem_context.h b/drivers/gpu/drm/i915/i915_gem_context.h
index b4f60c918e19..78d451f9d44d 100644
--- a/drivers/gpu/drm/i915/i915_gem_context.h
+++ b/drivers/gpu/drm/i915/i915_gem_context.h
@@ -64,6 +64,8 @@ struct i915_gem_context {
/** file_priv: owning file descriptor */
struct drm_i915_file_private *file_priv;
+ struct intel_engine_cs **engines;
+
struct i915_timeline *timeline;
/**
@@ -127,6 +129,8 @@ struct i915_gem_context {
#define CONTEXT_BANNED 4
#define CONTEXT_FORCE_SINGLE_SUBMISSION 5
+ unsigned int nengine;
+
/**
* @hw_id: - unique identifier for the context
*
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index e514e602cd70..da4da976a7e3 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1979,13 +1979,23 @@ static const enum intel_engine_id user_ring_map[I915_USER_RINGS + 1] = {
};
static struct intel_engine_cs *
-eb_select_engine(struct drm_i915_private *dev_priv,
+eb_select_engine(struct i915_execbuffer *eb,
struct drm_file *file,
struct drm_i915_gem_execbuffer2 *args)
{
unsigned int user_ring_id = args->flags & I915_EXEC_RING_MASK;
struct intel_engine_cs *engine;
+ if (eb->ctx->engines) {
+ if (user_ring_id >= eb->ctx->nengine) {
+ DRM_DEBUG("execbuf with unknown ring: %u\n",
+ user_ring_id);
+ return NULL;
+ }
+
+ return eb->ctx->engines[user_ring_id];
+ }
+
if (user_ring_id > I915_USER_RINGS) {
DRM_DEBUG("execbuf with unknown ring: %u\n", user_ring_id);
return NULL;
@@ -1998,11 +2008,11 @@ eb_select_engine(struct drm_i915_private *dev_priv,
return NULL;
}
- if (user_ring_id == I915_EXEC_BSD && HAS_BSD2(dev_priv)) {
+ if (user_ring_id == I915_EXEC_BSD && HAS_BSD2(eb->i915)) {
unsigned int bsd_idx = args->flags & I915_EXEC_BSD_MASK;
if (bsd_idx == I915_EXEC_BSD_DEFAULT) {
- bsd_idx = gen8_dispatch_bsd_engine(dev_priv, file);
+ bsd_idx = gen8_dispatch_bsd_engine(eb->i915, file);
} else if (bsd_idx >= I915_EXEC_BSD_RING1 &&
bsd_idx <= I915_EXEC_BSD_RING2) {
bsd_idx >>= I915_EXEC_BSD_SHIFT;
@@ -2013,9 +2023,9 @@ eb_select_engine(struct drm_i915_private *dev_priv,
return NULL;
}
- engine = dev_priv->engine[_VCS(bsd_idx)];
+ engine = eb->i915->engine[_VCS(bsd_idx)];
} else {
- engine = dev_priv->engine[user_ring_map[user_ring_id]];
+ engine = eb->i915->engine[user_ring_map[user_ring_id]];
}
if (!engine) {
@@ -2227,7 +2237,7 @@ i915_gem_do_execbuffer(struct drm_device *dev,
goto err_destroy;
err = -EINVAL;
- eb.engine = eb_select_engine(eb.i915, file, args);
+ eb.engine = eb_select_engine(&eb, file, args);
if (!eb.engine)
goto err_engine;
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h
index 5e970cac3c92..ac9261b59531 100644
--- a/include/uapi/drm/i915_drm.h
+++ b/include/uapi/drm/i915_drm.h
@@ -1499,9 +1499,40 @@ struct drm_i915_gem_context_param {
#define I915_CONTEXT_MAX_FREQUENCY(x) ((x) >> 32)
#define I915_CONTEXT_SET_FREQUENCY(min, max) ((__u64)(max) << 32 | (min))
+/*
+ * I915_CONTEXT_PARAM_ENGINES:
+ *
+ * Bind this context to operate on this subset of available engines. Henceforth,
+ * the I915_EXEC_RING selector for DRM_IOCTL_I915_GEM_EXECBUFFER2 operates as
+ * an index into this array of engines; I915_EXEC_DEFAULT selecting engine[0]
+ * and upwards. The array created is offset by 1, such that by default
+ * I915_EXEC_DEFAULT is left empty, to be filled in as directed. Slots 1...N
+ * are then filled in using the specified (class, instance).
+ *
+ * Setting the number of engines bound to the context will revert back to
+ * default settings.
+ *
+ * See struct i915_context_param_engines.
+ */
+#define I915_CONTEXT_PARAM_ENGINES 0x9
+
__u64 value;
};
+struct i915_user_extension {
+ __u64 next_extension;
+ __u64 name;
+};
+
+struct i915_context_param_engines {
+ __u64 extensions;
+
+ struct {
+ __u32 class; /* see enum drm_i915_gem_engine_class */
+ __u32 instance;
+ } class_instance[0];
+};
+
enum drm_i915_oa_format {
I915_OA_FORMAT_A13 = 1, /* HSW only */
I915_OA_FORMAT_A29, /* HSW only */
--
2.17.0
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