✗ Fi.CI.BAT: failure for series starting with [01/74] drm/i915/gtt: Avoid calling non-existent allocate_va_range

Patchwork patchwork at emeril.freedesktop.org
Mon Apr 30 16:10:35 UTC 2018 

== Series Details ==

Series: series starting with [01/74] drm/i915/gtt: Avoid calling non-existent allocate_va_range
URL   : https://patchwork.freedesktop.org/series/42453/
State : failure

== Summary ==

= CI Bug Log - changes from CI_DRM_4113 -> Trybot_2098 =

== Summary - FAILURE ==

  Serious unknown changes coming with Trybot_2098 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Trybot_2098, please notify your bug team to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: https://patchwork.freedesktop.org/api/1.0/series/42453/revisions/1/mbox/

== Possible new issues ==

  Here are the unknown changes that may have been introduced in Trybot_2098:

  === IGT changes ===

    ==== Possible regressions ====

    igt at gem_ctx_create@basic-files:
      fi-hsw-4770:        PASS -> FAIL
      fi-hsw-4200u:       PASS -> FAIL

    igt at gem_exec_suspend@basic-s3:
      fi-hsw-4770:        PASS -> INCOMPLETE
      fi-hsw-4200u:       PASS -> INCOMPLETE

    
    ==== Warnings ====

    igt at gem_ctx_create@basic:
      fi-elk-e7500:       SKIP -> PASS +6

    igt at gem_ctx_exec@basic:
      fi-ilk-650:         SKIP -> PASS +6
      fi-bwr-2160:        SKIP -> PASS +6

    
== Known issues ==

  Here are the changes found in Trybot_2098 that come from known issues:

  === IGT changes ===

    ==== Issues hit ====

    igt at kms_pipe_crc_basic@suspend-read-crc-pipe-b:
      fi-snb-2520m:       PASS -> INCOMPLETE (fdo#103713)

    
  fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713


== Participating hosts (38 -> 34) ==

  Missing    (4): fi-ctg-p8600 fi-ilk-m540 fi-bxt-dsi fi-skl-6700hq 


== Build changes ==

    * Linux: CI_DRM_4113 -> Trybot_2098

  CI_DRM_4113: 1d2a421b1f9b47883b9d0eeb28dc4069e462dbe3 @ git://anongit.freedesktop.org/gfx-ci/linux
  IGT_4452: 29ae12bd764e3b1876356e7628a32192b4ec9066 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
  Trybot_2098: 6c72375693d65789f8353aa336ac517732f993ed @ git://anongit.freedesktop.org/gfx-ci/linux
  piglit_4452: 04a2952c5b3782eb03cb136bb16d89daaf243f14 @ git://anongit.freedesktop.org/piglit


== Linux commits ==

6c72375693d6 virtual
875c1b32a83c set-engines
79a6b25175c8 drm/i915: Re-arrange execbuf so context is known before engine
b80816318294 drm/i915: Fix I915_EXEC_RING_MASK
aacfe139d613 single-timeline-per-queue
9a7851f65ed6 drm/i915: Extend CREATE_CONTEXT to allow inheritance ala clone()
d8d37204f68f rt-active
c70fb0e8c362 drm/i915: Start returning an error from i915_vma_move_to_active()
2e44dbbc9766 drm/i915: Refactor export_fence() after i915_vma_move_to_active()
725f6e871809 drm/i915: Priority boost switching to an idle ring
52f12c9354a3 drm/i915: Priority boost for new clients
ed0d7af56701 drm/i915/execlists: Switch to rb_root_cached
634f59d39d20 drm/i915: Only signal from interrupt when requested
8cfc4f9c543a drm/i915: Move the irq_counter inside the spinlock
3bacee41e3a4 drm/i915: Reduce spinlock hold time during notify_ring() interrupt
3baeedd7ec2e drm/i915: Support per-context user requests for GPU frequency control
93778b111e9b drm/i915: Remove unwarranted clamping for hsw/bdw
3660df884605 drm/i915,intel_ips: Enable GPU wait-boosting with IPS
5944fa8c5b97 drm/i915: Pull IPS into GT power management
086eb836f218 drm/i915: Rename rps min/max frequencies
2645a09089aa drm/i915: Refactor frequency bounds computation
b10ed299ef1e drm/i915: Simplify rc6/rps enabling
67c1e70f3bf9 drm/i915: Enabling rc6 and rps have different requirements, so separate them
da9631a7dfd2 drm/i915: Split control of rps and rc6
b839da35a274 drm/i915: Reorder GT interface code
207cffd16121 drm/i915: Remove defunct intel_suspend_gt_powersave()
b21a89b1ef32 drm/i915: Track HAS_RPS alongside HAS_RC6 in the device info
b189f7e9ce36 drm/i915: Move all the RPS irq handlers to intel_gt_pm
f4d8a1e8afce drm/i915: Move rps worker to intel_gt_pm.c
ae385dbb00ac drm/i915: Split GT powermanagement functions to intel_gt_pm.c
be6c391e8e31 drm/i915: Enable render context support for gen4 (Broadwater to Cantiga)
479fd87ec755 drm/i915: Enable render context support for Ironlake (gen5)
695d3fcc2eae drm/i915: Generalize i915_gem_sanitize() to reset contexts
968132cbf9a8 drm/i915: Record logical context support in driver caps
ccc78fe06534 drm/i915: Mark up Ironlake ips with rpm wakerefs
767723c6e2a6 drm/i915: Move sandybride pcode access to intel_sideband.c
6fcfb52099ec drm/i915: Merge sandybridge_pcode_(read|write)
c0dd8e590dcf drm/i915: Merge sbi read/write into a single accessor
8e0849785baf drm/i915: Separate sideband declarations to intel_sideband.h
4d4701c76115 drm/i915: Replace pcu_lock with sb_lock
56c59826e83d Revert "drm/i915: Avoid tweaking evaluation thresholds on Baytrail v3"
1acd05ba498a drm/i915: Reduce RPS update frequency on Valleyview/Cherryview
1897b2c93a3d drm/i915: Lift sideband locking for vlv_punit_(read|write)
d8d0e2c4f29f drm/i915: Lift acquiring the vlv punit magic to a common sb-get
5f53a92df044 drm/i915: Disable preemption and sleeping while using the punit sideband
bc32f982289c drm/i915: Allow user control over preempt timeout on their important context
8487269f359d drm/i915: Use a preemption timeout to enforce interactivity
37db93ccf842 drm/i915/preemption: Select timeout when scheduling
32895ed34e9f drm/i915/execlists: Try preempt-reset from hardirq timer context
222cbe14f3dc drm/i915/execlists: Force preemption via reset on timeout
2a7a09f50217 drm/i915: Allow init_breadcrumbs to be used from irq context
14a7bacbdf63 drm/i915/guc: Make submission tasklet hardirq safe
313c9f1eded0 drm/i915/execlists: Make submission tasklet hardirq safe
d68bb5ac34db drm/i915: Be irqsafe inside reset
dca4cdebeab4 drm/i915: Stop parking the signaler around reset
9dc5567ec9c3 drm/i915: Combine tasklet_kill and tasklet_disable
5486190232ad drm/i915/execlists: Flush pending preemption events during reset
2c27b1ac791b drm/i915: Split execlists/guc reset preparations
aa17586b9317 drm/i915: Move engine reset prepare/finish to backends
3743aadf0c20 drm/i915/execlists: Refactor out complete_preempt_context()
c868e03f4a52 drm/i915: Store a pointer to intel_context in i915_request
6c3ccbcb7631 drm/i915: Move fiddling with engine->last_retired_context
acac3a5d275c drm/i915: Move request->ctx aside
507cc9a6c628 drm/i915: Keep one request in our ring_list
e6d16ba831fa drm/i915: Lazily unbind vma on close
d3d46f9e9599 drm/i915: Split i915_gem_timeline into individual timelines
db1fb7736328 drm/i915: Move timeline from GTT to ring
daf9d09f9141 drm/i915: Only track live rings for retiring
5949eea44d23 drm/i915: Retire requests along rings
96ba272be8d8 drm/i915: Wrap engine->context_pin() and engine->context_unpin()
1a308bb64744 drm/i915: Stop tracking timeline->inflight_seqnos
d14cc7f18bcb drm/i915/gtt: Enable full-ppgtt by default for HSW
5e7ca25c212a drm/i915/gtt: Avoid calling non-existent allocate_va_range

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_2098/issues.html

More information about the Intel-gfx-trybot mailing list