[PATCH 20/22] wip debug
José Roberto de Souza
jose.souza at intel.com
Wed Aug 1 20:23:45 UTC 2018
---
drivers/gpu/drm/i915/i915_drv.c | 5 +++++
drivers/gpu/drm/i915/intel_device_info.c | 8 ++++----
drivers/gpu/drm/i915/intel_fbdev.c | 2 ++
drivers/gpu/drm/i915/intel_pm.c | 1 +
drivers/gpu/drm/i915/intel_runtime_pm.c | 8 +++++++-
5 files changed, 19 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 22d06d21a587..987b9db2a18b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -878,6 +878,11 @@ static int i915_driver_init_early(struct drm_i915_private *dev_priv,
memcpy(device_info, match_info, sizeof(*device_info));
device_info->device_id = dev_priv->drm.pdev->device;
+ if (i915_modparams.disable_display) {
+ DRM_DEBUG_KMS("Setting num_pipes=0 as display is disabled\n");
+ device_info->num_pipes = 0;
+ }
+
BUILD_BUG_ON(INTEL_MAX_PLATFORMS >
sizeof(device_info->platform_mask) * BITS_PER_BYTE);
BUG_ON(device_info->gen > sizeof(device_info->gen_mask) * BITS_PER_BYTE);
diff --git a/drivers/gpu/drm/i915/intel_device_info.c b/drivers/gpu/drm/i915/intel_device_info.c
index 0ef0c6448d53..81c613ca44d9 100644
--- a/drivers/gpu/drm/i915/intel_device_info.c
+++ b/drivers/gpu/drm/i915/intel_device_info.c
@@ -776,10 +776,8 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
info->num_sprites[pipe] = 1;
}
- if (i915_modparams.disable_display) {
- DRM_INFO("Display disabled (module parameter)\n");
- info->num_pipes = 0;
- } else if (info->num_pipes > 0 &&
+
+ if (info->num_pipes > 0 &&
(IS_GEN7(dev_priv) || IS_GEN8(dev_priv)) &&
HAS_PCH_SPLIT(dev_priv)) {
u32 fuse_strap = I915_READ(FUSE_STRAP);
@@ -835,6 +833,8 @@ void intel_device_info_runtime_init(struct intel_device_info *info)
disabled_mask);
else
info->num_pipes -= num_bits;
+ } else {
+ DRM_DEBUG_KMS("else in intel_device_info_runtime_init() info->num_pipes=%d\n", info->num_pipes);
}
/* Initialize slice/subslice/EU info */
diff --git a/drivers/gpu/drm/i915/intel_fbdev.c b/drivers/gpu/drm/i915/intel_fbdev.c
index fb2f9fce34cd..1e7ce44c8979 100644
--- a/drivers/gpu/drm/i915/intel_fbdev.c
+++ b/drivers/gpu/drm/i915/intel_fbdev.c
@@ -183,6 +183,8 @@ static int intelfb_create(struct drm_fb_helper *helper,
void __iomem *vaddr;
int ret;
+ WARN_ON(!INTEL_INFO(dev_priv)->num_pipes);
+
if (intel_fb &&
(sizes->fb_width > intel_fb->base.width ||
sizes->fb_height > intel_fb->base.height)) {
diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
index 9189e7675129..ca7beffae7d8 100644
--- a/drivers/gpu/drm/i915/intel_pm.c
+++ b/drivers/gpu/drm/i915/intel_pm.c
@@ -9285,6 +9285,7 @@ void intel_init_pm(struct drm_i915_private *dev_priv)
else if (IS_GEN5(dev_priv))
i915_ironlake_get_mem_freq(dev_priv);
+ // this stuff makes sense here?
/* For FIFO watermark updates */
if (INTEL_GEN(dev_priv) >= 9) {
skl_setup_wm_latency(dev_priv);
diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
index 145445bb5aa7..70c7cae41275 100644
--- a/drivers/gpu/drm/i915/intel_runtime_pm.c
+++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
@@ -974,7 +974,7 @@ static void vlv_init_display_clock_gating(struct drm_i915_private *dev_priv)
I915_WRITE(MI_ARB_VLV, MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE);
I915_WRITE(CBR1_VLV, 0);
- WARN_ON(dev_priv->rawclk_freq == 0);
+ WARN_ON(INTEL_INFO(dev_priv)->num_pipes && dev_priv->rawclk_freq == 0);
I915_WRITE(RAWCLK_FREQ_VLV,
DIV_ROUND_CLOSEST(dev_priv->rawclk_freq, 1000));
@@ -985,6 +985,10 @@ static void vlv_display_power_well_init(struct drm_i915_private *dev_priv)
struct intel_encoder *encoder;
enum pipe pipe;
+ // TODO no need to run that
+
+ WARN_ON(!INTEL_INFO(dev_priv)->num_pipes);
+
/*
* Enable the CRI clock source so we can get at the
* display and the reference clock for VGA
@@ -1638,6 +1642,8 @@ void intel_display_power_put(struct drm_i915_private *dev_priv,
if (domain == POWER_DOMAIN_INIT && !INTEL_INFO(dev_priv)->num_pipes)
goto end;
+ DRM_DEBUG_KMS("intel_display_power_put() domain=%d\n", domain);
+
power_domains = &dev_priv->power_domains;
mutex_lock(&power_domains->lock);
--
2.18.0
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