[PATCH 22/22] Revert "irq"
José Roberto de Souza
jose.souza at intel.com
Wed Aug 1 20:23:47 UTC 2018
This reverts commit 073de93475748c97d0483a5dd0bc99dcdcbf856d.
---
drivers/gpu/drm/i915/i915_irq.c | 147 +++++++++++---------------------
1 file changed, 52 insertions(+), 95 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index ad21d7d6c9b9..255e034e7ee4 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -3553,13 +3553,11 @@ static void ironlake_irq_reset(struct drm_device *dev)
if (IS_GEN5(dev_priv))
I915_WRITE(HWSTAM, 0xffffffff);
- if (INTEL_INFO(dev_priv)->num_pipes) {
- GEN3_IRQ_RESET(DE);
- if (IS_GEN7(dev_priv))
- I915_WRITE(GEN7_ERR_INT, 0xffffffff);
- }
+ GEN3_IRQ_RESET(DE);
+ if (IS_GEN7(dev_priv))
+ I915_WRITE(GEN7_ERR_INT, 0xffffffff);
- if (IS_HASWELL(dev_priv) && INTEL_INFO(dev_priv)->num_pipes) {
+ if (IS_HASWELL(dev_priv)) {
I915_WRITE(EDP_PSR_IMR, 0xffffffff);
I915_WRITE(EDP_PSR_IIR, 0xffffffff);
}
@@ -3578,9 +3576,6 @@ static void valleyview_irq_reset(struct drm_device *dev)
gen5_gt_irq_reset(dev_priv);
- if (!INTEL_INFO(dev_priv)->num_pipes)
- return;
-
spin_lock_irq(&dev_priv->irq_lock);
if (dev_priv->display_irqs_enabled)
vlv_display_irq_reset(dev_priv);
@@ -3605,9 +3600,6 @@ static void gen8_irq_reset(struct drm_device *dev)
gen8_gt_irq_reset(dev_priv);
- if (!INTEL_INFO(dev_priv)->num_pipes)
- return;
-
I915_WRITE(EDP_PSR_IMR, 0xffffffff);
I915_WRITE(EDP_PSR_IIR, 0xffffffff);
@@ -3651,9 +3643,6 @@ static void gen11_irq_reset(struct drm_device *dev)
gen11_gt_irq_reset(dev_priv);
- if (!INTEL_INFO(dev_priv)->num_pipes)
- return;
-
I915_WRITE(GEN11_DISPLAY_INT_CTL, 0);
for_each_pipe(dev_priv, pipe)
@@ -3722,9 +3711,6 @@ static void cherryview_irq_reset(struct drm_device *dev)
gen8_gt_irq_reset(dev_priv);
- if (!INTEL_INFO(dev_priv)->num_pipes)
- return;
-
GEN3_IRQ_RESET(GEN8_PCU_);
spin_lock_irq(&dev_priv->irq_lock);
@@ -4065,7 +4051,7 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
DE_DP_A_HOTPLUG);
}
- if (IS_HASWELL(dev_priv) && INTEL_INFO(dev_priv)->num_pipes) {
+ if (IS_HASWELL(dev_priv)) {
gen3_assert_iir_is_zero(dev_priv, EDP_PSR_IIR);
intel_psr_irq_control(dev_priv, dev_priv->psr.debug);
display_mask |= DE_EDP_PSR_INT_HSW;
@@ -4075,17 +4061,15 @@ static int ironlake_irq_postinstall(struct drm_device *dev)
ibx_irq_pre_postinstall(dev);
- if (INTEL_INFO(dev_priv)->num_pipes)
- GEN3_IRQ_INIT(DE, dev_priv->irq_mask, display_mask | extra_mask);
+ GEN3_IRQ_INIT(DE, dev_priv->irq_mask, display_mask | extra_mask);
gen5_gt_irq_postinstall(dev);
- if (INTEL_INFO(dev_priv)->num_pipes)
- ilk_hpd_detection_setup(dev_priv);
+ ilk_hpd_detection_setup(dev_priv);
ibx_irq_postinstall(dev);
- if (IS_IRONLAKE_M(dev_priv) && INTEL_INFO(dev_priv)->num_pipes) {
+ if (IS_IRONLAKE_M(dev_priv)) {
/* Enable PCU event interrupts
*
* spinlocking not required here for correctness since interrupt
@@ -4134,12 +4118,10 @@ static int valleyview_irq_postinstall(struct drm_device *dev)
gen5_gt_irq_postinstall(dev);
- if (INTEL_INFO(dev_priv)->num_pipes) {
- spin_lock_irq(&dev_priv->irq_lock);
- if (dev_priv->display_irqs_enabled)
- vlv_display_irq_postinstall(dev_priv);
- spin_unlock_irq(&dev_priv->irq_lock);
- }
+ spin_lock_irq(&dev_priv->irq_lock);
+ if (dev_priv->display_irqs_enabled)
+ vlv_display_irq_postinstall(dev_priv);
+ spin_unlock_irq(&dev_priv->irq_lock);
I915_WRITE(VLV_MASTER_IER, MASTER_INTERRUPT_ENABLE);
POSTING_READ(VLV_MASTER_IER);
@@ -4254,8 +4236,7 @@ static int gen8_irq_postinstall(struct drm_device *dev)
ibx_irq_pre_postinstall(dev);
gen8_gt_irq_postinstall(dev_priv);
- if (INTEL_INFO(dev_priv)->num_pipes)
- gen8_de_irq_postinstall(dev_priv);
+ gen8_de_irq_postinstall(dev_priv);
if (HAS_PCH_SPLIT(dev_priv))
ibx_irq_postinstall(dev);
@@ -4317,13 +4298,11 @@ static int gen11_irq_postinstall(struct drm_device *dev)
icp_irq_postinstall(dev);
gen11_gt_irq_postinstall(dev_priv);
- if (INTEL_INFO(dev_priv)->num_pipes)
- gen8_de_irq_postinstall(dev_priv);
+ gen8_de_irq_postinstall(dev_priv);
GEN3_IRQ_INIT(GEN11_GU_MISC_, ~gu_misc_masked, gu_misc_masked);
- if (INTEL_INFO(dev_priv)->num_pipes)
- I915_WRITE(GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE);
+ I915_WRITE(GEN11_DISPLAY_INT_CTL, GEN11_DISPLAY_IRQ_ENABLE);
I915_WRITE(GEN11_GFX_MSTR_IRQ, GEN11_MASTER_IRQ);
POSTING_READ(GEN11_GFX_MSTR_IRQ);
@@ -4337,12 +4316,10 @@ static int cherryview_irq_postinstall(struct drm_device *dev)
gen8_gt_irq_postinstall(dev_priv);
- if (INTEL_INFO(dev_priv)->num_pipes) {
- spin_lock_irq(&dev_priv->irq_lock);
- if (dev_priv->display_irqs_enabled)
- vlv_display_irq_postinstall(dev_priv);
- spin_unlock_irq(&dev_priv->irq_lock);
- }
+ spin_lock_irq(&dev_priv->irq_lock);
+ if (dev_priv->display_irqs_enabled)
+ vlv_display_irq_postinstall(dev_priv);
+ spin_unlock_irq(&dev_priv->irq_lock);
I915_WRITE(GEN8_MASTER_IRQ, GEN8_MASTER_IRQ_CONTROL);
POSTING_READ(GEN8_MASTER_IRQ);
@@ -4354,8 +4331,7 @@ static void i8xx_irq_reset(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
- if (INTEL_INFO(dev_priv)->num_pipes)
- i9xx_pipestat_irq_reset(dev_priv);
+ i9xx_pipestat_irq_reset(dev_priv);
I915_WRITE16(HWSTAM, 0xffff);
@@ -4365,7 +4341,7 @@ static void i8xx_irq_reset(struct drm_device *dev)
static int i8xx_irq_postinstall(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
- u16 enable_mask = I915_MASTER_ERROR_INTERRUPT | I915_USER_INTERRUPT;
+ u16 enable_mask;
I915_WRITE16(EMR, ~(I915_ERROR_PAGE_TABLE |
I915_ERROR_MEMORY_REFRESH));
@@ -4376,15 +4352,14 @@ static int i8xx_irq_postinstall(struct drm_device *dev)
I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
I915_MASTER_ERROR_INTERRUPT);
- if (INTEL_INFO(dev_priv)->num_pipes)
- enable_mask |= I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
- I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
+ enable_mask =
+ I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
+ I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
+ I915_MASTER_ERROR_INTERRUPT |
+ I915_USER_INTERRUPT;
GEN2_IRQ_INIT(, dev_priv->irq_mask, enable_mask);
- if (!INTEL_INFO(dev_priv)->num_pipes)
- return 0;
-
/* Interrupt setup is already guaranteed to be single-threaded, this is
* just to make the assert_spin_locked check happy. */
spin_lock_irq(&dev_priv->irq_lock);
@@ -4520,16 +4495,13 @@ static void i915_irq_reset(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
- if (INTEL_INFO(dev_priv)->num_pipes) {
- if (I915_HAS_HOTPLUG(dev_priv)) {
- i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);
- I915_WRITE(PORT_HOTPLUG_STAT,
- I915_READ(PORT_HOTPLUG_STAT));
- }
-
- i9xx_pipestat_irq_reset(dev_priv);
+ if (I915_HAS_HOTPLUG(dev_priv)) {
+ i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);
+ I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
}
+ i9xx_pipestat_irq_reset(dev_priv);
+
I915_WRITE(HWSTAM, 0xffffffff);
GEN3_IRQ_RESET();
@@ -4538,8 +4510,7 @@ static void i915_irq_reset(struct drm_device *dev)
static int i915_irq_postinstall(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
- u32 enable_mask = I915_MASTER_ERROR_INTERRUPT |
- I915_USER_INTERRUPT;
+ u32 enable_mask;
I915_WRITE(EMR, ~(I915_ERROR_PAGE_TABLE |
I915_ERROR_MEMORY_REFRESH));
@@ -4551,12 +4522,14 @@ static int i915_irq_postinstall(struct drm_device *dev)
I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
I915_MASTER_ERROR_INTERRUPT);
- if (INTEL_INFO(dev_priv)->num_pipes)
- enable_mask |= I915_ASLE_INTERRUPT |
- I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
- I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
+ enable_mask =
+ I915_ASLE_INTERRUPT |
+ I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
+ I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
+ I915_MASTER_ERROR_INTERRUPT |
+ I915_USER_INTERRUPT;
- if (INTEL_INFO(dev_priv)->num_pipes && I915_HAS_HOTPLUG(dev_priv)) {
+ if (I915_HAS_HOTPLUG(dev_priv)) {
/* Enable in IER... */
enable_mask |= I915_DISPLAY_PORT_INTERRUPT;
/* and unmask in IMR */
@@ -4565,9 +4538,6 @@ static int i915_irq_postinstall(struct drm_device *dev)
GEN3_IRQ_INIT(, dev_priv->irq_mask, enable_mask);
- if (!INTEL_INFO(dev_priv)->num_pipes)
- return 0;
-
/* Interrupt setup is already guaranteed to be single-threaded, this is
* just to make the assert_spin_locked check happy. */
spin_lock_irq(&dev_priv->irq_lock);
@@ -4638,12 +4608,10 @@ static void i965_irq_reset(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
- if (INTEL_INFO(dev_priv)->num_pipes) {
- i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);
- I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
+ i915_hotplug_interrupt_update(dev_priv, 0xffffffff, 0);
+ I915_WRITE(PORT_HOTPLUG_STAT, I915_READ(PORT_HOTPLUG_STAT));
- i9xx_pipestat_irq_reset(dev_priv);
- }
+ i9xx_pipestat_irq_reset(dev_priv);
I915_WRITE(HWSTAM, 0xffffffff);
@@ -4653,7 +4621,7 @@ static void i965_irq_reset(struct drm_device *dev)
static int i965_irq_postinstall(struct drm_device *dev)
{
struct drm_i915_private *dev_priv = to_i915(dev);
- u32 enable_mask = I915_MASTER_ERROR_INTERRUPT | I915_USER_INTERRUPT;
+ u32 enable_mask;
u32 error_mask;
/*
@@ -4679,22 +4647,19 @@ static int i965_irq_postinstall(struct drm_device *dev)
I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
I915_MASTER_ERROR_INTERRUPT);
- if (INTEL_INFO(dev_priv)->num_pipes) {
- enable_mask |=
- I915_ASLE_INTERRUPT |
- I915_DISPLAY_PORT_INTERRUPT |
- I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
- I915_DISPLAY_PIPE_B_EVENT_INTERRUPT;
- }
+ enable_mask =
+ I915_ASLE_INTERRUPT |
+ I915_DISPLAY_PORT_INTERRUPT |
+ I915_DISPLAY_PIPE_A_EVENT_INTERRUPT |
+ I915_DISPLAY_PIPE_B_EVENT_INTERRUPT |
+ I915_MASTER_ERROR_INTERRUPT |
+ I915_USER_INTERRUPT;
if (IS_G4X(dev_priv))
enable_mask |= I915_BSD_USER_INTERRUPT;
GEN3_IRQ_INIT(, dev_priv->irq_mask, enable_mask);
- if (!INTEL_INFO(dev_priv)->num_pipes)
- return 0;
-
/* Interrupt setup is already guaranteed to be single-threaded, this is
* just to make the assert_spin_locked check happy. */
spin_lock_irq(&dev_priv->irq_lock);
@@ -4802,8 +4767,7 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
struct intel_rps *rps = &dev_priv->gt_pm.rps;
int i;
- if (INTEL_INFO(dev_priv)->num_pipes)
- intel_hpd_init_work(dev_priv);
+ intel_hpd_init_work(dev_priv);
INIT_WORK(&rps->work, gen6_pm_rps_work);
@@ -4941,12 +4905,6 @@ void intel_irq_init(struct drm_i915_private *dev_priv)
if (I915_HAS_HOTPLUG(dev_priv))
dev_priv->display.hpd_irq_setup = i915_hpd_irq_setup;
}
-
- if (!INTEL_INFO(dev_priv)->num_pipes) {
- dev->driver->enable_vblank = NULL;
- dev->driver->disable_vblank = NULL;
- dev_priv->display.hpd_irq_setup = NULL;
- }
}
/**
@@ -4996,8 +4954,7 @@ int intel_irq_install(struct drm_i915_private *dev_priv)
void intel_irq_uninstall(struct drm_i915_private *dev_priv)
{
drm_irq_uninstall(&dev_priv->drm);
- if (INTEL_INFO(dev_priv)->num_pipes)
- intel_hpd_cancel_work(dev_priv);
+ intel_hpd_cancel_work(dev_priv);
dev_priv->runtime_pm.irqs_enabled = false;
}
--
2.18.0
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