[PATCH 2/2] drm/i915/execlists: Clear STOP_RING bit before restoring the context
Chris Wilson
chris at chris-wilson.co.uk
Tue Aug 14 11:29:23 UTC 2018
Signed-off-by: Chris Wilson <chris at chris-wilson.co.uk>
---
drivers/gpu/drm/i915/intel_lrc.c | 15 +++++++++++++++
drivers/gpu/drm/i915/intel_lrc_reg.h | 2 ++
2 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 3f90c74038ef..eb824eb18626 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1338,6 +1338,21 @@ __execlists_context_pin(struct intel_engine_cs *engine,
GEM_BUG_ON(!intel_ring_offset_valid(ce->ring, ce->ring->head));
ce->lrc_reg_state[CTX_RING_HEAD+1] = ce->ring->head;
+ /*
+ * After a reset the context may have preserved the STOP bit
+ * of RING_MI_MODE we use to freeze an active engine before the
+ * reset. If that bit is restored the ring stops instead of
+ * executing.
+ */
+ if (ce->lrc_reg_state[CTX_MI_MODE] == engine->mmio_base + 0x9c) {
+ pr_err("Found MI_MODE(%s): %08x [%s %s]\n", engine->name,
+ ce->lrc_reg_state[CTX_MI_MODE + 1],
+ (ce->lrc_reg_state[CTX_MI_MODE + 1] & MODE_IDLE) ? "idle" : "",
+ (ce->lrc_reg_state[CTX_MI_MODE + 1] & STOP_RING) ? "stopped" : "");
+ ce->lrc_reg_state[CTX_MI_MODE + 1] |= STOP_RING << 16;
+ ce->lrc_reg_state[CTX_MI_MODE + 1] &= ~STOP_RING;
+ }
+
ce->state->obj->pin_global++;
i915_gem_context_get(ctx);
return ce;
diff --git a/drivers/gpu/drm/i915/intel_lrc_reg.h b/drivers/gpu/drm/i915/intel_lrc_reg.h
index 5ef932d810a7..3b155ecbfa92 100644
--- a/drivers/gpu/drm/i915/intel_lrc_reg.h
+++ b/drivers/gpu/drm/i915/intel_lrc_reg.h
@@ -39,6 +39,8 @@
#define CTX_R_PWR_CLK_STATE 0x42
#define CTX_END 0x44
+#define CTX_MI_MODE 0x54
+
#define CTX_REG(reg_state, pos, reg, val) do { \
u32 *reg_state__ = (reg_state); \
const u32 pos__ = (pos); \
--
2.18.0
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