[PATCH 2/2] idle
Chris Wilson
chris at chris-wilson.co.uk
Thu Feb 1 07:32:37 UTC 2018
---
drivers/gpu/drm/i915/i915_gem.c | 2 +-
drivers/gpu/drm/i915/intel_lrc.c | 13 ++++++++-----
2 files changed, 9 insertions(+), 6 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 63308ec016a3..6090ef3141be 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3134,7 +3134,7 @@ void i915_gem_reset(struct drm_i915_private *dev_priv)
* an incoherent read by the CS (presumably stale TLB). An
* empty request appears sufficient to paper over the glitch.
*/
- if (list_empty(&engine->timeline->requests)) {
+ if (intel_engine_is_idle(engine)) {
struct drm_i915_gem_request *rq;
rq = i915_gem_request_alloc(engine,
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 40dbeaee9dfa..42e8be541030 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -1462,6 +1462,9 @@ static void enable_execlists(struct intel_engine_cs *engine)
I915_WRITE(RING_HWS_PGA(engine->mmio_base),
engine->status_page.ggtt_offset);
POSTING_READ(RING_HWS_PGA(engine->mmio_base));
+
+ /* Following the reset, we need to reload the CSB read/write pointers */
+ engine->execlists.csb_head = -1;
}
static int gen8_init_common_ring(struct intel_engine_cs *engine)
@@ -1479,11 +1482,6 @@ static int gen8_init_common_ring(struct intel_engine_cs *engine)
enable_execlists(engine);
DRM_DEBUG_DRIVER("Execlists enabled for %s\n", engine->name);
- GEM_BUG_ON(engine->id >= ARRAY_SIZE(gtiir));
-
- execlists->csb_head = -1;
- execlists->active = 0;
-
/* After a GPU reset, we may have requests to replay */
if (execlists->first)
tasklet_schedule(&execlists->tasklet);
@@ -1528,6 +1526,8 @@ static void reset_irq(struct intel_engine_cs *engine)
{
struct drm_i915_private *dev_priv = engine->i915;
+ GEM_BUG_ON(engine->id >= ARRAY_SIZE(gtiir));
+
/*
* Clear any pending interrupt state.
*
@@ -1572,6 +1572,9 @@ static void reset_common_ring(struct intel_engine_cs *engine,
spin_unlock_irqrestore(&engine->timeline->lock, flags);
+ /* Mark all CS interrupts as complete */
+ execlists->active = 0;
+
/* If the request was innocent, we leave the request in the ELSP
* and will try to replay it on restarting. The context image may
* have been corrupted by the reset, in which case we may have
--
2.15.1
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