[PATCH 18/18] drm/i915: Display WA 528, 857, 1142
Vidya Srinivas
vidya.srinivas at intel.com
Mon Feb 26 02:55:57 UTC 2018
Implementing WA 528, 857 and 1142 to see if it helps
remove underruns on KBL/APL IGT BAT
Signed-off-by: Chandra Konduru <chandra.konduru at intel.com>
Signed-off-by: Nabendu Maiti <nabendu.bikash.maiti at intel.com>
Signed-off-by: Vidya Srinivas <vidya.srinivas at intel.com>
---
drivers/gpu/drm/i915/intel_display.c | 55 ++++++++++++++++++++++++++++++++++++
1 file changed, 55 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index bb0d908..480d3b2 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -504,6 +504,50 @@ skl_wa_clkgate(struct drm_i915_private *dev_priv, int pipe, bool enable)
~(DUPS1_GATING_DIS|DUPS2_GATING_DIS));
}
+static void
+skl_wa_528(struct drm_i915_private *dev_priv, int pipe, bool enable)
+{
+ if (IS_SKYLAKE(dev_priv))
+ return;
+
+ if (enable)
+ I915_WRITE(CHICKEN_PIPESL_1(pipe),
+ I915_READ(CHICKEN_PIPESL_1(pipe)) |
+ HSW_FBCQ_DIS);
+ else
+ I915_WRITE(CHICKEN_PIPESL_1(pipe),
+ I915_READ(CHICKEN_PIPESL_1(pipe)) &
+ HSW_FBCQ_DIS);
+}
+
+static void
+skl_wa_857(struct drm_i915_private *dev_priv, bool enable)
+{
+ if (IS_SKYLAKE(dev_priv))
+ return;
+
+ if (enable)
+ I915_WRITE(GEN8_CHICKEN_DCPR_1,
+ I915_READ(GEN8_CHICKEN_DCPR_1) |
+ MASK_WAKEMEM);
+ else
+ I915_WRITE(GEN8_CHICKEN_DCPR_1,
+ I915_READ(GEN8_CHICKEN_DCPR_1) &
+ MASK_WAKEMEM);
+}
+
+static void
+skl_wa_1142(struct drm_i915_private *dev_priv, bool enable)
+{
+ if (IS_SKYLAKE(dev_priv))
+ return;
+
+ if (enable) {
+ I915_WRITE(CHICKEN_MISC_2, 2 << 13);
+ I915_WRITE(CHICKEN_PAR1_1, 1 << 22);
+ }
+}
+
static bool
needs_modeset(const struct drm_crtc_state *state)
{
@@ -3177,6 +3221,14 @@ int skl_check_plane_surface(const struct intel_crtc_state *crtc_state,
fb->width << 16, fb->height << 16,
DRM_MODE_ROTATE_270);
+ if (fb->modifier == I915_FORMAT_MOD_Y_TILED ||
+ fb->modifier == I915_FORMAT_MOD_Yf_TILED) {
+ DRM_ERROR("Vidya 857 called\n");
+ skl_wa_857(dev_priv, true);
+ }
+ else
+ skl_wa_857(dev_priv, false);
+
/*
* Handle the AUX surface first since
* the main surface setup depends on it.
@@ -3191,6 +3243,9 @@ int skl_check_plane_surface(const struct intel_crtc_state *crtc_state,
if (!IS_GEMINILAKE(dev_priv))
skl_wa_clkgate(dev_priv,
intel_crtc->pipe, true);
+ skl_wa_528(dev_priv,
+ intel_crtc->pipe, true);
+ skl_wa_1142(dev_priv, true);
}
} else if (fb->modifier == I915_FORMAT_MOD_Y_TILED_CCS ||
fb->modifier == I915_FORMAT_MOD_Yf_TILED_CCS) {
--
2.7.4
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